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公开(公告)号：US20220014756A1
公开(公告)日：2022-01-13
申请号：US17487034
申请日：2021-09-28
Applicant: Texas Instruments Incorporated
Inventor： Naveen Srinivasamurthy , Manoj Koul , Soyeb Nagori , Peter Labaziewicz , Kedar Chitnis
IPC: H04N19/14 , H04N19/46 , H04N19/513 , H04N19/61 , H04N19/137 , H04N19/85 , H04N19/124 , H04N19/176 , H04N19/186
Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
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公开(公告)号：US09628787B2
公开(公告)日：2017-04-18
申请号：US14607053
申请日：2015-01-27
Applicant: Texas Instruments Incorporated
Inventor： Rahul Gulati , Vasant Easwaran , Mihir Narendra Mody , Prashant Dinkar Karandikar , Prithvi Y. A. Shankar , Aishwarya Dubey , Kedar Chitnis , Rajat Sagar
CPC classification number: H04N17/002 , G06T7/0002 , G06T2207/30168 , G06T2207/30252
Abstract: A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.
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公开(公告)号：US20170034516A1
公开(公告)日：2017-02-02
申请号：US15294389
申请日：2016-10-14
Applicant: Texas Instruments Incorporated
Inventor： Naveen Srinivasamurthy , Manoj Koul , Soyeb Nagori , Peter Labaziewicz , Kedar Chitnis
IPC: H04N19/14 , H04N19/513 , H04N19/124 , H04N19/176 , H04N19/85 , H04N19/186
CPC classification number: H04N19/14 , H04N19/124 , H04N19/137 , H04N19/176 , H04N19/186 , H04N19/46 , H04N19/513 , H04N19/61 , H04N19/85
Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
Abstract translation: 提高视频编码器性能的方法和系统。 该方法包括处理前端图像预处理器中的初始视频信号以获得处理后的视频信号和与该信号相关的处理器信息，将经处理的视频信号和处理器信息提供给视频编码器，并对视频信号进行编码 视频编码器根据处理器信息提供编码视频信号进行存储。 该系统包括可连接以接收初始视频信号的视频预处理器。 与视频预处理器通信的视频编码器接收经处理的视频信号和处理器信息。 与视频编码器通信的存储介质存储经编码的视频信号。
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公开(公告)号：US11159797B2
公开(公告)日：2021-10-26
申请号：US16561346
申请日：2019-09-05
Applicant: Texas Instruments Incorporated
Inventor： Naveen Srinivasamurthy , Manoj Koul , Soyeb Nagori , Peter Labaziewicz , Kedar Chitnis
IPC: H04N19/14 , H04N19/46 , H04N19/513 , H04N19/61 , H04N19/137 , H04N19/85 , H04N19/124 , H04N19/176 , H04N19/186
Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
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公开(公告)号：US20210326229A1
公开(公告)日：2021-10-21
申请号：US17135481
申请日：2020-12-28
Applicant: Texas Instruments Incorporated
Inventor： Rajat Sagar , Niraj Nandan , Kedar Chitnis , Brijesh Jadav , Mihir Mody
Abstract: Methods, apparatus, systems and articles of manufacture for an example event processor are disclosed to retrieve an input event and an input event timestamp corresponding to the input event, generate an output event based on the input event and the input event timestamp, in response to determination that an input event threshold is exceeded within a threshold of time, and an anomaly detector to retrieve the output event, determine whether the output event indicates threat to functional safety of a system on a chip, and in response to determining the output event indicates threat to functional safety of the system on a chip, adapt a process for the system on a chip to preserve functional safety.
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Patent Agency Ranking
公开(公告)号：US10448022B2
公开(公告)日：2019-10-15
申请号：US15294389
申请日：2016-10-14
Applicant: Texas Instruments Incorporated
Inventor： Naveen Srinivasamurthy , Manoj Koul , Soyeb Nagori , Peter Labaziewicz , Kedar Chitnis
IPC: H04N19/85 , H04N19/14 , H04N19/46 , H04N19/513 , H04N19/61 , H04N19/137 , H04N19/124 , H04N19/176 , H04N19/186
Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
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公开(公告)号：US20230333858A1
公开(公告)日：2023-10-19
申请号：US17721534
申请日：2022-04-15
Applicant: Texas Instruments Incorporated
Inventor： Sriramakrishnan Govindarajan , Mihir Narendra Mody , Prithvi Shankar Yeyyadi Anantha , Shailesh Ghotgalkar , Kedar Chitnis
IPC: G06F9/4401 , H04L9/32
CPC classification number: G06F9/4401 , H04L9/3247
Abstract: An example apparatus includes: a first interface configured to couple to a processor core; a second interface configured to couple to a first memory configured to store an image that includes a set of slices; a third interface coupled to the first interface, the third interface configured to couple to a second memory; a direct memory access circuit coupled to the second interface and the third interface and configured to: receive a transaction from the second interface, wherein the transaction specifies a read of a slice of the set of slices; and based on the transaction: read the slice from the first memory; perform on-the-fly operations to the slice; and store the slice in the second memory.
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公开(公告)号：US20190394468A1
公开(公告)日：2019-12-26
申请号：US16561346
申请日：2019-09-05
Applicant: Texas Instruments Incorporated
Inventor： Naveen Srinivasamurthy , Manoj Koul , Soyeb Nagori , Peter Labaziewicz , Kedar Chitnis
IPC: H04N19/14 , H04N19/46 , H04N19/513 , H04N19/61 , H04N19/137 , H04N19/85 , H04N19/124 , H04N19/176 , H04N19/186
Abstract: Method and system to improve the performance of a video encoder. The method includes processing an initial video signal in a front-end image pre-processor to obtain a processed video signal and processor information respecting the signal, providing the processed video signal and the processor information to a video encoder, and encoding the video signal in the video encoder according to the processor information to provide an encoded video signal for storage. The system includes a video pre-processor connectable to receive an initial video signal. The video encoder in communication with the video pre-processor receives a processed video signal and a processor information. A storage medium in communication with the video encoder stores an encoded video signal.
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公开(公告)号：US20150304648A1
公开(公告)日：2015-10-22
申请号：US14607053
申请日：2015-01-27
Applicant: Texas Instruments Incorporated
Inventor： Rahul Gulati , Vasant Easwaran , Mihir Narendra Mody , Prashant Dinkar Karandikar , Prithvi Y.A. Shankar , Aishwarya Dubey , Kedar Chitnis , Rajat Sagar
CPC classification number: H04N17/002 , G06T7/0002 , G06T2207/30168 , G06T2207/30252
Abstract: A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.
Abstract translation: 提供了一种用于测试片上系统（SOC）的成像子系统的方法，其包括在所述SOC的处理器上周期性地执行成像子系统测试软件指令，响应于所述成像子系统的执行而接收所述成像子系统中的参考图像数据 测试软件指令，由成像子系统对参考图像数据执行图像信号处理，以生成经处理的参考图像数据，以及通过测试软件指令使用经处理的参考图像数据来验证成像子系统是否正确地操作。
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公开(公告)号：US12242379B2
公开(公告)日：2025-03-04
申请号：US18082693
申请日：2022-12-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kedar Chitnis , Mihir Narendra Mody , Prithvi Shankar Yeyyadi Anantha , Sriramakrishnan Govindarajan , Mohd Farooqui , Shailesh Ghotgalkar
IPC: G06F12/02
Abstract: In an example, a method includes storing code for a first central processing unit (CPU) executing a first application in a first region of a memory, and storing code for a second CPU executing a second application in a second region of the memory. The method includes storing shared code for the first CPU and the second CPU in a third region of the memory. The method includes storing read-write data for the first CPU in a fourth region of the memory and storing read-write data for the second CPU in a fifth region of the memory. The method includes translating a first address from a first unique address space for the first CPU to a shared address space in the third region, and translating a second address from a second unique address space for the second CPU to the shared address space in the third region.
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