公开(公告)号：US11569808B2

公开(公告)日：2023-01-31

申请号：US17515077

申请日：2021-10-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri ,  Ritesh Jitendra Oza ,  Laszlo Balogh

IPC: H03K5/00 ,  H03K5/24 ,  H03K19/003 ,  H03K17/08

Abstract: An apparatus includes a differential input pair, a first resistor, a second resistor, and a comparator. The differential input pair having first and second differential inputs. The first differential input is adapted to be coupled to an output of a controller and the second differential input is adapted to be coupled to a signal ground of the controller. The first resistor is adapted to be coupled to a third resistor via the first differential input to form a first voltage divider. The second resistor is adapted to be coupled to a fourth resistor via the second differential input to form a second voltage divider. The comparator having first and second comparator inputs. The first comparator input is coupled between the first resistor and the first differential input. The second comparator input is coupled between the second resistor and the second differential input.

公开(公告)号：US20240313660A1

公开(公告)日：2024-09-19

申请号：US18141245

申请日：2023-04-28

Applicant: Texas Instruments Incorporated

Inventor： Laszlo Balogh ,  Michael Lueders ,  Stefan Herzer ,  Maik Peter Kaufmann

IPC: H02M3/335 ,  H02M1/00 ,  H02M1/36

CPC classification number: H02M3/33576 ,  H02M1/0009 ,  H02M1/0025 ,  H02M1/36

Abstract: A self-biasing circuit for power converters is disclosed. In an example, an apparatus includes a first transistor coupled between an inductor terminal and a ground terminal, and a second transistor coupled between the inductor terminal and a bias terminal. The first transistor has a first control terminal, and the second transistor has a second control terminal. In an example, the first and second transistors are configured to split a current at the inductor terminal. The apparatus further includes a controller having first and second control outputs, where the first control output is coupled to the first control terminal, the second control output is coupled to the second control terminal.

公开(公告)号：US11575314B2

公开(公告)日：2023-02-07

申请号：US17334651

申请日：2021-05-28

Applicant: Texas Instruments Incorporated

Inventor： Saad Pervaiz ,  Sombuddha Chakraborty ,  Philomena Brady ,  Laszlo Balogh

IPC: H02M1/42 ,  H02M3/335 ,  H02M1/08 ,  H02M1/00

Abstract: A controller for a boost power factor correction (PFC) converter. The controller is configured to operate the boost PFC converter in multiple operating modes, including a continuous conduction mode (CCM), a transition mode (TM), and a hybrid mode in which the controller operates the converter in both CCM and TM within a same line cycle. An example controller includes a current control loop and a mode transition circuit. The current control loop is configured to compute an inductor current for each of first and second operation modes, based on a current sample taken, for example, during a boost synchronous rectifier conduction period of the converter. The mode transition circuit includes digital logic circuitry and is configured to generate a pulse indicating that one, two or all three of: zero-voltage switching (ZVS) has been achieved; the synchronous rectifier conduction period is active; and/or one of TM or hybrid mode is active.

公开(公告)号：US20220393574A1

公开(公告)日：2022-12-08

申请号：US17334651

申请日：2021-05-28

Applicant: Texas Instruments Incorporated

Inventor： Saad Pervaiz ,  Sombuddha Chakraborty ,  Philomena Brady ,  Laszlo Balogh

IPC: H02M1/42 ,  H02M1/00 ,  H02M1/08 ,  H02M3/335

Abstract: A controller for a boost power factor correction (PFC) converter. The controller is configured to operate the boost PFC converter in multiple operating modes, including a continuous conduction mode (CCM), a transition mode (TM), and a hybrid mode in which the controller operates the converter in both CCM and TM within a same line cycle. An example controller includes a current control loop and a mode transition circuit. The current control loop is configured to compute an inductor current for each of first and second operation modes, based on a current sample taken, for example, during a boost synchronous rectifier conduction period of the converter. The mode transition circuit includes digital logic circuitry and is configured to generate a pulse indicating that one, two or all three of: zero-voltage switching (ZVS) has been achieved; the synchronous rectifier conduction period is active; and/or one of TM or hybrid mode is active.