公开(公告)号：US11569808B2

公开(公告)日：2023-01-31

申请号：US17515077

申请日：2021-10-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri ,  Ritesh Jitendra Oza ,  Laszlo Balogh

IPC: H03K5/00 ,  H03K5/24 ,  H03K19/003 ,  H03K17/08

Abstract: An apparatus includes a differential input pair, a first resistor, a second resistor, and a comparator. The differential input pair having first and second differential inputs. The first differential input is adapted to be coupled to an output of a controller and the second differential input is adapted to be coupled to a signal ground of the controller. The first resistor is adapted to be coupled to a third resistor via the first differential input to form a first voltage divider. The second resistor is adapted to be coupled to a fourth resistor via the second differential input to form a second voltage divider. The comparator having first and second comparator inputs. The first comparator input is coupled between the first resistor and the first differential input. The second comparator input is coupled between the second resistor and the second differential input.

公开(公告)号：US11855630B2

公开(公告)日：2023-12-26

申请号：US17828797

申请日：2022-05-31

Applicant: Texas Instruments Incorporated

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri

IPC: H03K19/0175 ,  H03K19/0185 ,  H03K17/10 ,  H03K3/356 ,  H03K19/003

CPC classification number: H03K19/018528 ,  H03K3/356113 ,  H03K17/102 ,  H03K19/00361 ,  H03K19/017509

Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.

公开(公告)号：US20240080028A1

公开(公告)日：2024-03-07

申请号：US18507502

申请日：2023-11-13

Applicant: Texas Instruments Incorporated

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri

IPC: H03K19/0185 ,  H03K3/356 ,  H03K17/10 ,  H03K19/003 ,  H03K19/0175

CPC classification number: H03K19/018528 ,  H03K3/356113 ,  H03K17/102 ,  H03K19/00361 ,  H03K19/017509

Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.

公开(公告)号：US12176899B2

公开(公告)日：2024-12-24

申请号：US18507502

申请日：2023-11-13

Applicant: Texas Instruments Incorporated

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri

IPC: H03K19/0175 ,  G01R19/165 ,  H03K3/356 ,  H03K5/22 ,  H03K17/10 ,  H03K19/003 ,  H03K19/0185

Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.

公开(公告)号：US20230387916A1

公开(公告)日：2023-11-30

申请号：US17828797

申请日：2022-05-31

Applicant: Texas Instruments Incorporated

Inventor： Tuli Luthuli Dake ,  Satish Kumar Vemuri

IPC: H03K19/0185 ,  H03K19/003 ,  H03K3/356 ,  H03K17/10

CPC classification number: H03K19/018528 ,  H03K19/00361 ,  H03K3/356113 ,  H03K17/102

Abstract: Techniques are described herein to enhance capability of floating level translators. For example, increased headroom is accomplished by adaptively bypassing the protection elements of the voltage level translator. In an example, a floating level translator can translate an input signal from a low-voltage domain to a high-voltage domain. A bypass circuit is coupled across the protection elements. The bypass circuit selectively engages during low-voltage operation (e.g., thereby providing a lower loss path relative to loss caused by the high-voltage protection elements and thus increasing the headroom swing), and disengages responsive to the high-voltage reference rail of the high-voltage domain exceeding a threshold or otherwise being high enough (e.g., greater than the potential of the low-voltage domain power rail). The bypass circuit can be implemented in a relatively low-complexity manner (e.g., back-to-back high-voltage FETs) without additional signals to control low-voltage capability.