公开(公告)号：US10107841B2

公开(公告)日：2018-10-23

申请号：US15172403

申请日：2016-06-03

Applicant: Texas Instruments Incorporated

Inventor： Viktor Tasevski ,  Kemal S. Demirci

IPC: H02M1/08 ,  G01R19/04

Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

公开(公告)号：US10408643B2

公开(公告)日：2019-09-10

申请号：US15276348

申请日：2016-09-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shanmuganand Chellamuthu ,  Viktor Tasevski ,  Ted F. Lekan ,  Fei Xu

IPC: G01D5/243 ,  G01D5/20

Abstract: Methods, apparatus, systems and articles of manufacture to increase resolver-to-digital converter accuracy are disclosed. Example methods and apparatus compare a first induced signal and a first threshold signal to determine a first zero-cross signal, compare a second induced signal with the first threshold signal to determine a second zero-cross signal, compare an inducing signal with the first threshold signal to determine a third zero-cross signal, compare the first induced signal and a second threshold signal to determine a first zero-cross confirmation signal, the first zero-cross confirmation signal to indicate when to use the first zero-cross signal to determine a phase difference between the inducing signal and at least one of the first induced signal or the second induced signal, and compare the second induced sinusoidal signal and the second threshold signal to determine a second zero-cross confirmation signal, the second zero-cross confirmation signal to indicate when to use the second zero-cross signal to determine the phase difference.

公开(公告)号：US20180052013A1

公开(公告)日：2018-02-22

申请号：US15276348

申请日：2016-09-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shanmuganand Chellamuthu ,  Viktor Tasevski ,  Ted F. Lekan ,  Fei Xu

IPC: G01D5/243

CPC classification number: G01D5/243 ,  G01D5/2073

Abstract: Methods, apparatus, systems and articles of manufacture to increase resolver-to-digital converter accuracy are disclosed. Example methods and apparatus compare a first induced signal and a first threshold signal to determine a first zero-cross signal, compare a second induced signal with the first threshold signal to determine a second zero-cross signal, compare an inducing signal with the first threshold signal to determine a third zero-cross signal, compare the first induced signal and a second threshold signal to determine a first zero-cross confirmation signal, the first zero-cross confirmation signal to indicate when to use the first zero-cross signal to determine a phase difference between the inducing signal and at least one of the first induced signal or the second induced signal, and compare the second induced sinusoidal signal and the second threshold signal to determine a second zero-cross confirmation signal, the second zero-cross confirmation signal to indicate when to use the second zero-cross signal to determine the phase difference.

公开(公告)号：US20170023621A1

公开(公告)日：2017-01-26

申请号：US15172403

申请日：2016-06-03

Applicant: Texas Instruments Incorporated

Inventor： Viktor Tasevski ,  Kemal S. Demirci

IPC: G01R19/04

CPC classification number: G01R19/04

Abstract: In described examples, an apparatus includes: an input terminal for receiving an alternating current voltage signal; a clamping circuit coupled to the input terminal outputting a clamped voltage signal that is constrained in magnitude; a first comparator coupled to the clamped voltage signal outputting a first compare signal when the clamped voltage signal is a positive voltage that exceeds a positive threshold; and a second comparator coupled to the clamped voltage signal outputting a second compare signal when the clamped voltage signal is a negative voltage that exceeds a negative threshold. The apparatus includes a timer circuit coupled to the first and second compare signal outputting a time duration signal corresponding to a time between the first and second compare signals; and a logic circuit coupled to the time duration output signal determining a peak voltage of the alternative current voltage signal responsive to the time duration output signal.

Abstract translation: 在上述例子中，一种装置包括：一个用于接收交流电压信号的输入端; 耦合到输入端子的钳位电路输出被限制在大小上的钳位电压信号; 耦合到所述钳位电压信号的第一比较器，当所述钳位的电压信号是超过正阈值的正电压时，输出第一比较信号; 以及耦合到所述钳位电压信号的第二比较器，当所述钳位的电压信号是超过负阈值的负电压时，所述第二比较器输出第二比较信号。 该装置包括一个与第一和第二比较信号耦合的定时器电路，输出对应于第一和第二比较信号之间的时间的持续时间信号; 以及逻辑电路，其耦合到所述持续时间输出信号，以响应于所述持续时间输出信号确定所述备选电流电压信号的峰值电压。