公开(公告)号：US10439482B2

公开(公告)日：2019-10-08

申请号：US15713204

申请日：2017-09-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shailendra Kumar Baranwal ,  William Todd Harrison ,  Yogesh Kumar Ramadass

IPC: H02M3/157 ,  H02M1/08 ,  H02M3/156 ,  H02M1/44 ,  H03K17/16 ,  H02M3/158 ,  H02M1/00

Abstract: In an embodiment, an adaptive drive strength switching converter includes a driver and a control loop coupled to the driver. In an embodiment, the control loop includes a peak detector, a comparator coupled to an output of the peak detector, a counter coupled to an output of the comparator, and a digital-to-analog converter (DAC) coupled to an output of the comparator.

公开(公告)号：US11901271B2

公开(公告)日：2024-02-13

申请号：US18148627

申请日：2022-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi Tang ,  Liang Wan ,  William Todd Harrison ,  Manu Joseph Prakuzhy ,  Rajen Manicon Murugan

IPC: H01L23/495 ,  H02M3/158 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/32 ,  H02M3/158 ,  H01L2224/32245

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.

公开(公告)号：US11545420B2

公开(公告)日：2023-01-03

申请号：US16787327

申请日：2020-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi Tang ,  Liang Wan ,  William Todd Harrison ,  Manu Joseph Prakuzhy ,  Rajen Manicon Murugan

IPC: H01L23/495 ,  H02M3/158 ,  H01L23/00

Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.