公开(公告)号：US20250098252A1

公开(公告)日：2025-03-20

申请号：US18379667

申请日：2023-10-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ke-Ting Chen ,  Ching-Ling Lin ,  Wen-An Liang ,  Chia-Fu Hsu

IPC: H01L29/40 ,  H01L21/311 ,  H01L29/417 ,  H01L29/423

Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a contact etch stop layer (CESL) adjacent to the metal gate, and an interlayer dielectric (ILD) layer around the gate structure, performing a first etching process to remove the ILD layer, performing a second etching process to remove the CESL for forming a first contact hole, and then forming a first contact plug in the first contact hole. Preferably, a width of the first contact plug adjacent to the CESL is less than a width of the first contact plug under the CESL.