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公开(公告)号:US11569133B2
公开(公告)日:2023-01-31
申请号:US16859959
申请日:2020-04-27
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ching-Ling Lin , Wen-An Liang , Chen-Ming Huang
IPC: H01L21/8234 , H01L29/66 , H01L29/78 , H01L21/764 , H01L27/088 , H01L29/06
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.
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公开(公告)号:US10892194B2
公开(公告)日:2021-01-12
申请号:US16914483
申请日:2020-06-29
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Fu-Jung Chuang , Ching-Ling Lin , Po-Jen Chuang , Yu-Ren Wang , Wen-An Liang , Chia-Ming Kuo , Guan-Wei Huang , Yuan-Yu Chung , I-Ming Tseng
IPC: H01L21/00 , H01L21/8238 , H01L27/092 , H01L21/762
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion, and a gate structure on the SDB structure. Preferably, the SDB structure includes silicon oxycarbonitride (SiOCN), a concentration portion of oxygen in SiOCN is between 30% to 60%, and the gate structure includes a metal gate having a n-type work function metal layer or a p-type work function metal layer.
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公开(公告)号:US20200176331A1
公开(公告)日:2020-06-04
申请号:US16782083
申请日:2020-02-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Fu-Jung Chuang , Ching-Ling Lin , Po-Jen Chuang , Yu-Ren Wang , Wen-An Liang , Chia-Ming Kuo , Guan-Wei Huang , Yuan-Yu Chung , I-Ming Tseng
IPC: H01L21/8238 , H01L27/092 , H01L21/762
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion, and a gate structure on the SDB structure. Preferably, the SDB structure includes silicon oxycarbonitride (SiOCN), a concentration portion of oxygen in SiOCN is between 30% to 60%, and the gate structure includes a metal gate.
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公开(公告)号:US09653402B2
公开(公告)日:2017-05-16
申请号:US14844004
申请日:2015-09-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: I-Ming Tseng , Wen-An Liang , Chen-Ming Huang
IPC: H01L29/76 , H01L29/94 , H01L23/535 , H01L29/66 , H01L29/78 , H01L29/06 , H01L29/161 , H01L29/16
CPC classification number: H01L21/823475 , H01L21/76805 , H01L21/76895 , H01L21/823431 , H01L21/823481 , H01L23/485 , H01L23/535 , H01L27/0886 , H01L29/0649 , H01L29/0653 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/66515 , H01L29/66545 , H01L29/6681 , H01L29/7851
Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device including a fin structure, a first liner, a first insulating layer and a dummy gate structure. The fin structure is disposed on a substrate, where the fin structure has a trench. The first liner disposed in the trench. The first insulating layer disposed on the first liner. The dummy gate structure is disposed on the first insulating layer and disposed above the trench, where a bottom surface of the dummy gate and a top surface of the fin structure are on a same level.
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公开(公告)号:US20190019731A1
公开(公告)日:2019-01-17
申请号:US15647031
申请日:2017-07-11
Applicant: United Microelectronics Corp.
Inventor: Ching-Ling Lin , Wen-An Liang , Chen-Ming Huang
IPC: H01L21/8234 , H01L21/033
Abstract: A method for fabricating a semiconductor structure includes forming a plurality of mandrels over a substrate, wherein the substrate comprises a semiconductor substrate as a base. Then, a first dielectric layer is formed to cover on a predetermined mandrel of the mandrels. A second dielectric layer is formed over the substrate to cover the mandrels. The mandrels are removed, wherein a remaining portion of the first dielectric layer and the second dielectric layer at a sidewall of the mandrels remains on the substrate. An anisotropic etching process is performed over the substrate until a top portion of the semiconductor substrate is etched to form a plurality of fins corresponding to the remaining portion of the first dielectric layer and the second dielectric layer.
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公开(公告)号:US10032675B2
公开(公告)日:2018-07-24
申请号:US15473614
申请日:2017-03-30
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: I-Ming Tseng , Wen-An Liang , Chen-Ming Huang
IPC: H01L29/76 , H01L29/94 , H01L21/8234 , H01L21/768 , H01L29/66 , H01L27/088 , H01L29/06 , H01L23/535
Abstract: The present invention further provides a method for forming a semiconductor device, comprising: first, a substrate having a fin structure disposed thereon is provided, wherein the fin structure has a trench, next, a first liner in the trench is formed, a first insulating layer is formed on the first liner, afterwards, a shallow trench isolation is formed in the substrate and surrounding the fin structure, wherein a bottom surface of the shallow trench isolation is higher than a bottom surface of the first insulating layer, and a top surface of the shallow trench isolation is lower than a top surface of the first insulating layer, and a dummy gate structure is formed on the first insulating layer and disposed above the trench, wherein a bottom surface of the dummy gate structure and a top surface of the fin structure are on a same level.
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公开(公告)号:US09824931B2
公开(公告)日:2017-11-21
申请号:US14981929
申请日:2015-12-29
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: I-Ming Tseng , Wen-An Liang , Chen-Ming Huang
IPC: H01L29/06 , H01L29/78 , H01L27/088 , H01L21/762 , H01L21/8234 , H01L21/76 , H01L21/28 , H01L29/66 , H01L21/02 , H01L21/311 , H01L29/49
CPC classification number: H01L21/823481 , H01L21/0228 , H01L21/31105 , H01L21/823431 , H01L21/823437 , H01L21/82345 , H01L21/823456 , H01L27/0886 , H01L29/0649 , H01L29/0653 , H01L29/4966 , H01L29/66545 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a first shallow trench isolation (STI) around the fin-shaped structure; dividing the fin-shaped structure into a first portion and a second portion; and forming a second STI between the first portion and the second portion.
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公开(公告)号:US20170092643A1
公开(公告)日:2017-03-30
申请号:US14864908
申请日:2015-09-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: I-Ming Tseng , Wen-An Liang , Chen-Ming Huang
IPC: H01L27/088 , H01L21/02 , H01L21/306 , H01L21/762 , H01L21/8234 , H01L29/06 , H01L21/3105
CPC classification number: H01L27/0886 , H01L21/3081 , H01L21/762 , H01L21/76224 , H01L21/823431 , H01L21/823481 , H01L29/0653
Abstract: A semiconductor device and a method of fabricating the same, the semiconductor device includes a substrate, a plurality of fin shaped structures, a first trench and at least one bump. The substrate has a base. The fin shaped structures protrude from the base of the substrate. The first trench recesses from the base of the substrate and has a depth being smaller than a width of each of the fin shaped structures. The at least one bump is disposed on a surface of the first trench.
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9.
公开(公告)号:US20160276429A1
公开(公告)日:2016-09-22
申请号:US14684445
申请日:2015-04-13
Applicant: United Microelectronics Corp.
Inventor: I-Ming Tseng , Wen-An Liang , Rai-Min Huang , Chen-Ming Huang , Tong-Jyun Huang , Kuan-Hsien Li
IPC: H01L29/06 , H01L29/66 , H01L21/762 , H01L29/78 , H01L21/8234
CPC classification number: H01L29/66545 , H01L21/76224 , H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L27/0886 , H01L29/7851
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a fin shaped structure, a spacer layer and a dummy gate structure. The fin shaped structure is disposed on a substrate, wherein the fin shaped structure has a trench. The spacer layer is disposed on sidewalls of the trench. The dummy gate structure is disposed across the trench and includes a portion thereof disposed in the trench.
Abstract translation: 半导体器件及其形成方法,半导体器件包括鳍状结构,间隔层和虚拟栅极结构。 鳍状结构设置在基板上,其中鳍状结构具有沟槽。 间隔层设置在沟槽的侧壁上。 伪栅极结构跨越沟槽设置并且包括其设置在沟槽中的部分。
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公开(公告)号:US20230135742A1
公开(公告)日:2023-05-04
申请号:US18088631
申请日:2022-12-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ching-Ling Lin , Wen-An Liang , Chen-Ming Huang
IPC: H01L21/8234 , H01L29/06 , H01L27/088 , H01L21/764 , H01L29/66 , H01L29/78
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.
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