公开(公告)号：US20250132168A1

公开(公告)日：2025-04-24

申请号：US18513669

申请日：2023-11-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi-Ching Chen ,  Ching-Ling Lin ,  Wen-An Liang

IPC: H01L21/3213 ,  H01L21/3205 ,  H01L21/321 ,  H01L29/66

Abstract: A planarization method includes the following steps. A silicon layer is deposited on a substrate, and a top surface of the silicon layer includes a lower portion and a bump portion protruding upwards from the lower portion. An ion bombardment etching process is performed to the silicon layer for reducing a surface step height of the silicon layer. The top surface of the silicon layer is etched by the ion bombardment etching process to become a post-etching top surface, and a distance between a topmost portion of the post-etching top surface and a bottommost portion of the post-etching top surface in a vertical direction is less than a distance between a topmost portion of the bump portion and the lower portion in the vertical direction before the ion bombardment etching process. Subsequently, a chemical mechanical polishing process is performed to the post-etching top surface of the silicon layer.