公开(公告)号：US20220181505A1

公开(公告)日：2022-06-09

申请号：US17145416

申请日：2021-01-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Li Lin ,  Wei-Da Lin ,  Cheng-Guo Chen ,  Ta-Kang Lo ,  Yi-Chuan Chen ,  Huan-Chi Ma ,  Chien-Wen Yu ,  Kuan-Ting Lu ,  Kuo-Yu Liao

IPC: H01L29/94 ,  H01L29/66

Abstract: A MOS capacitor includes a substrate having a capacitor forming region thereon, an ion well having a first conductivity type in the substrate, a counter doping region having a second conductivity type in the ion well within the capacitor forming region, a capacitor dielectric layer on the ion well within the capacitor forming region, a gate electrode on the capacitor dielectric layer, a source doping region having the second conductivity type on a first side of the gate electrode within the capacitor forming region, and a drain doping region having the second conductivity type on a second side of the gate electrode within the capacitor forming region.

公开(公告)号：US20240413233A1

公开(公告)日：2024-12-12

申请号：US18221863

申请日：2023-07-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi-Chuan Chen ,  Po-Wei Wang ,  Huan-Chi Ma ,  Chien-Wen Yu

IPC: H01L29/778 ,  H01L21/02 ,  H01L23/29 ,  H01L23/31 ,  H01L29/20 ,  H01L29/40 ,  H01L29/47 ,  H01L29/66

Abstract: A GaN-based semiconductor device includes a substrate; a GaN channel layer disposed on the substrate; a AlGaN layer disposed on the GaN channel layer; a p-GaN gate layer disposed on the AlGaN layer; and a nitrogen-rich TiN hard mask layer disposed on the p-GaN gate layer. The nitrogen-rich TiN hard mask layer has a nitrogen-to-titanium (N/Ti) ratio that is greater than 1.0. A gate electrode layer is disposed on the nitrogen-rich TiN hard mask layer.

公开(公告)号：US20230048684A1

公开(公告)日：2023-02-16

申请号：US17976888

申请日：2022-10-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Li Lin ,  Wei-Da Lin ,  Cheng-Guo Chen ,  Ta-Kang Lo ,  Yi-Chuan Chen ,  Huan-Chi Ma ,  Chien-Wen Yu ,  Kuan-Ting Lu ,  Kuo-Yu Liao

IPC: H01L29/94 ,  H01L29/66

Abstract: A MOS capacitor includes a substrate having a capacitor forming region thereon, an ion well having a first conductivity type in the substrate, a counter doping region having a second conductivity type in the ion well within the capacitor forming region, a capacitor dielectric layer on the ion well within the capacitor forming region, a gate electrode on the capacitor dielectric layer, a source doping region having the second conductivity type on a first side of the gate electrode within the capacitor forming region, and a drain doping region having the second conductivity type on a second side of the gate electrode within the capacitor forming region.

公开(公告)号：US12283637B2

公开(公告)日：2025-04-22

申请号：US17976888

申请日：2022-10-31

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Jian-Li Lin ,  Wei-Da Lin ,  Cheng-Guo Chen ,  Ta-Kang Lo ,  Yi-Chuan Chen ,  Huan-Chi Ma ,  Chien-Wen Yu ,  Kuan-Ting Lu ,  Kuo-Yu Liao

IPC: H01L29/94 ,  H01L29/66

Abstract: A MOS capacitor includes a substrate having a capacitor forming region thereon, an ion well having a first conductivity type in the substrate, a counter doping region having a second conductivity type in the ion well within the capacitor forming region, a capacitor dielectric layer on the ion well within the capacitor forming region, a gate electrode on the capacitor dielectric layer, a source doping region having the second conductivity type on a first side of the gate electrode within the capacitor forming region, and a drain doping region having the second conductivity type on a second side of the gate electrode within the capacitor forming region.