公开(公告)号：US20250081553A1

公开(公告)日：2025-03-06

申请号：US18388870

申请日：2023-11-13

Applicant: University of Electronic Science and Technology of China

Inventor： Ming QIAO ,  Jue LI ,  Zesheng SHI ,  Daoming SHEN ,  Bo ZHANG

IPC: H01L29/06

Abstract: A power semiconductor device, including a cell region, a transition region, and a terminal region. The transition region is located between the cell region and the terminal region of the device. A first conduction type substrate, a first conduction type epitaxial layer located above the first conduction type substrate, and a first conduction type buffer layer located in the first conduction type epitaxial layer are jointly arranged at the bottoms of the cell region, the transition region, and the terminal region of the device. In a high-current application, since the cell region occupies the largest area of a chip, in a case that breakdown can occur in the cell region and the current can be discharged through the cell region. On the basis of ensuring the BV of the terminal region, a silicon layer step is formed by elevating the position of a top structure of the terminal region.