公开(公告)号：US20250117298A1

公开(公告)日：2025-04-10

申请号：US18376724

申请日：2023-10-04

Applicant: XILINX, INC. ,  Advanced Micro Devices, Inc.

Inventor： Kumar RAHUL ,  Santosh YACHARENI ,  Pierre MAILLARD ,  Mrinmoy GOSWAMI ,  Tabrez ALAM ,  Gokul Puthenpurayil RAVINDRAN ,  Md HUSSAIN ,  Sanat Kumar DUBEY ,  John J. WUU

IPC: G06F11/16 ,  G06F11/07

Abstract: Embodiments herein describe a circuit for detecting a single event upset (SEU). The circuit includes a latch including an output node, a first parity node, and a second parity node and correction circuitry configured to correct a single event upset (SEU) at the output node using the first and second parity nodes.