CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20190140012A1

    公开(公告)日:2019-05-09

    申请号:US16178483

    申请日:2018-11-01

    Applicant: XINTEC INC.

    Abstract: A chip package includes a chip structure, a molding material, a conductive layer, a redistribution layer, and a passivation layer. The chip structure has a front surface, a rear surface, a sidewall, a sensing area, and a conductive pad. The molding material covers the rear surface and the sidewall. The conductive layer extends form the conductive pad to the molding material located on the sidewall. The redistribution layer extends form the molding material that is located on the rear surface to the molding material that is located on the sidewall. The redistribution layer is in electrical contact with an end of the conductive layer facing away from the conductive pad. The passivation layer is located on the molding material and the redistribution layer. The passivation layer has an opening, and a portion of the redistribution layer is located in the opening.

Patent Agency Ranking