公开(公告)号：US10853134B2

公开(公告)日：2020-12-01

申请号：US15956480

申请日：2018-04-18

Applicant: Xilinx, Inc.

Inventor： Somdutt Javre ,  Siddharth Rele ,  Gangadhar Budde ,  Appa Rao Nali ,  Chaitanya Kamarapu

IPC: G06F9/50 ,  G06F8/20 ,  G06F9/4401 ,  G06F8/30

Abstract: Multi-domain creation and isolation within a heterogeneous System-on-Chip (SoC) may include receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources available within a heterogeneous SoC and creating, using computer hardware, a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources. The method may include assigning, using the computer hardware, an operating system to each domain and generating, using the computer hardware, a platform that is configured to implement the plurality of domains within the heterogeneous SoC.

公开(公告)号：US11593126B1

公开(公告)日：2023-02-28

申请号：US16928619

申请日：2020-07-14

Applicant: Xilinx, Inc.

Inventor： Sai Kiran Y Ganesh ,  Devi Vara Prasad Bandaru ,  Chaitanya Kamarapu ,  Vijaya Raghava Rao Dasyam ,  Appa Rao Nali ,  Vidhumouli Hunsigida

IPC: G06F8/41 ,  G06F9/445

Abstract: Implementing a design for a heterogeneous device can include mapping, using computer hardware, a plurality of applications of a design for a device to a plurality of domains of the device, wherein each domain includes a different compute unit, performing, using the computer hardware, validity checking on the plurality of applications, detecting, using the computer hardware, a conflict between two or more of the plurality of applications from the validity checking, and, in response to the detecting, generating a notification of the conflict using the computer hardware. Operations such as automatically generating a boot image, debugging, and/or performing system level performance analysis may also be performed.

公开(公告)号：US20190324806A1

公开(公告)日：2019-10-24

申请号：US15956480

申请日：2018-04-18

Applicant: Xilinx, Inc.

Inventor： Somdutt Javre ,  Siddharth Rele ,  Gangadhar Budde ,  Appa Rao Nali ,  Chaitanya Kamarapu

IPC: G06F9/50 ,  G06F8/20 ,  G06F9/4401 ,  G06F8/30

Abstract: Multi-domain creation and isolation within a heterogeneous System-on-Chip (SoC) may include receiving a hardware description file specifying a plurality of processors and a plurality of hardware resources available within a heterogeneous SoC and creating, using computer hardware, a plurality of domains for the heterogeneous SoC, wherein each domain includes a processor selected from the plurality of processors and a hardware resource selected from the plurality of hardware resources. The method may include assigning, using the computer hardware, an operating system to each domain and generating, using the computer hardware, a platform that is configured to implement the plurality of domains within the heterogeneous SoC.