公开(公告)号：US10419011B1

公开(公告)日：2019-09-17

申请号：US16108003

申请日：2018-08-21

Applicant: Xilinx, Inc.

Inventor： Roberto Pelliconi ,  Christophe Erdmann ,  Derek Chang

IPC: H03M1/10 ,  H03M1/74 ,  H03M1/66

Abstract: An example timing error measurement system includes a digital-to-analog converter (DAC) having a plurality of current steering circuits, the DAC responsive to a clock signal, a one-bit comparator coupled to a differential output of the DAC, a filter coupled to an output of the one-bit comparator, control logic coupled to an output of the filter, and a delay line coupled to an output of the control logic. An output of the delay line is coupled to an input of the one-bit comparator. The delay line is configured to delay the clock signal.