公开(公告)号：US10862500B1

公开(公告)日：2020-12-08

申请号：US16683731

申请日：2019-11-14

Applicant: Xilinx, Inc.

Inventor： Roberto Pelliconi ,  Bob Verbruggen ,  Brendan Farley ,  Christophe Erdmann

IPC: H03M1/66 ,  H04B1/00 ,  H03M1/74

Abstract: Apparatus and associated methods relate to maintaining a total current of a switch cell in a digital-to-analog converter at a controllable operating point by adjusting shunt current control signals applied to programmable shunt current sources in opposite polarity with respect to a tail current control signal applied to a programmable tail current source. In an illustrative example, the total current may flow through differential legs of a switch cell. The programmable shunt current sources may, for example, be configured to compensate for adjustments to the programmable tail current source. In an illustrative example, tail current and shunt currents may flow through a pair of cascode transistors. In various examples, controlling the programmable shunt current sources to compensate adjustments to the tail current source may, for example, permit controlled common mode voltage or operating point so as to reduce device voltage stress over a wider dynamic range of output voltages.

公开(公告)号：US10581450B1

公开(公告)日：2020-03-03

申请号：US16249230

申请日：2019-01-16

Applicant: Xilinx, Inc.

Inventor： Brendan Farley ,  Bob W. Verbruggen ,  Christophe Erdmann ,  Roberto Pelliconi

IPC: H03M1/66 ,  H03G3/30 ,  H03F3/45

Abstract: Apparatus and associated methods relating to a digital-to-analog converter (DAC) include a programmable resistance network coupled between a voltage supply node VDD and a switch cell circuit to provide a predetermined resistance in response to the VDD and current IS of the switch cell circuit. In an illustrative example, the DAC may include a switch cell circuit comprising one or more switch cells connected in parallel. Each switch cell may include a differential gain circuit having a first branch coupled to a second branch at an input of a current source. The programmable resistance may include a variable resistance configured to adjust a voltage (Vbias) supplied to the switch cell circuit in response to a control signal. By introducing the programmable resistance network, predetermined bias and/or gain values may be dynamically adjusted with a constant board-level power supply VDD.

公开(公告)号：US10419011B1

公开(公告)日：2019-09-17

申请号：US16108003

申请日：2018-08-21

Applicant: Xilinx, Inc.

Inventor： Roberto Pelliconi ,  Christophe Erdmann ,  Derek Chang

IPC: H03M1/10 ,  H03M1/74 ,  H03M1/66

Abstract: An example timing error measurement system includes a digital-to-analog converter (DAC) having a plurality of current steering circuits, the DAC responsive to a clock signal, a one-bit comparator coupled to a differential output of the DAC, a filter coupled to an output of the one-bit comparator, control logic coupled to an output of the filter, and a delay line coupled to an output of the control logic. An output of the delay line is coupled to an input of the one-bit comparator. The delay line is configured to delay the clock signal.