公开(公告)号：US11327899B1

公开(公告)日：2022-05-10

申请号：US16933923

申请日：2020-07-20

Applicant: XILINX, INC.

Inventor： Ygal Arbel ,  Sagheer Ahmad ,  Gaurav Singh

IPC: G06F12/1027 ,  H03K19/1776

Abstract: An example programmable integrated circuit (IC) includes a processing system having a processor, a master circuit, and a system memory management unit (SMMU). The SMMU includes a first translation buffer unit (TBU) coupled to the master circuit, an address translation (AT) circuit, an AT interface coupled to the AT circuit, and a second TBU coupled to the AT circuit, and programmable logic coupled to the AT circuit in the SMMU through the AT interface.

公开(公告)号：US10719452B2

公开(公告)日：2020-07-21

申请号：US16016349

申请日：2018-06-22

Applicant: Xilinx, Inc.

Inventor： Ygal Arbel ,  Sagheer Ahmad ,  Gaurav Singh

IPC: G06F12/1027 ,  H03K19/1776

Abstract: An example programmable integrated circuit (IC) includes a processing system having a processor, a master circuit, and a system memory management unit (SMMU). The SMMU includes a first translation buffer unit (TBU) coupled to the master circuit, an address translation (AT) circuit, an AT interface coupled to the AT circuit, and a second TBU coupled to the AT circuit, and programmable logic coupled to the AT circuit in the SMMU through the AT interface.

公开(公告)号：US20190391929A1

公开(公告)日：2019-12-26

申请号：US16016349

申请日：2018-06-22

Applicant: Xilinx, Inc.

Inventor： Ygal Arbel ,  Sagheer Ahmad ,  Gaurav Singh

IPC: G06F12/1027 ,  H03K19/177

Abstract: An example programmable integrated circuit (IC) includes a processing system having a processor, a master circuit, and a system memory management unit (SMMU). The SMMU includes a first translation buffer unit (TBU) coupled to the master circuit, an address translation (AT) circuit, an AT interface coupled to the AT circuit, and a second TBU coupled to the AT circuit, and programmable logic coupled to the AT circuit in the SMMU through the AT interface.