公开(公告)号：US20240184616A1

公开(公告)日：2024-06-06

申请号：US18075731

申请日：2022-12-06

Applicant: Xilinx, Inc.

Inventor： Tharun Kumar Ksheerasagar ,  Hemant Kashyap ,  Amit Kasat ,  Meghana Tripathi ,  Shantanu Mishra

IPC: G06F9/48 ,  G06F9/455

CPC classification number: G06F9/48 ,  G06F9/455

Abstract: A thread manager creates multiple threads by to execute a simulation of subsystems of a system-on-chip on multiple processor cores in response to execution of a simulation program. The threads execute multiple cycle-accurate simulation models of the subsystems in parallel in an execution phase of each simulation cycle of a plurality of simulation cycles of the simulation. The threads update interfaces of the simulation models in an update phase of each simulation cycle of the plurality of simulation cycles.