公开(公告)号：US10659437B1

公开(公告)日：2020-05-19

申请号：US16144705

申请日：2018-09-27

Applicant: Xilinx, Inc.

Inventor： Ravi Sunkavalli ,  Anujan Varma ,  Chuan Cheng Pan ,  Patrick C. McCarthy ,  Hanh Hoang

IPC: H04L29/06

Abstract: A circuit arrangement includes an encryption circuit and a decryption circuit. A cryptographic shell circuit has a transmit channel and a receive channel in parallel with the transmit channel. The transmit channel includes an encryption interface circuit coupled to the encryption circuit. The encryption interface circuit determines first cryptographic parameters based on data in a plaintext input packet and inputs the first cryptographic parameters and plaintext input packet to the encryption circuit. The receive channel includes a decryption interface circuit coupled to the decryption circuit. The decryption interface circuit determines second cryptographic parameters based on data in a ciphertext input packet and inputs the second cryptographic parameters and ciphertext input packet to the decryption circuit. The encryption circuit encrypts the plaintext input packet based on the first cryptographic parameters, and the decryption circuit decrypts the ciphertext input packet based on the second cryptographic parameters.