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公开(公告)号:US10707138B1
公开(公告)日:2020-07-07
申请号:US15473395
申请日:2017-03-29
Applicant: Xilinx, Inc.
Inventor: Shiying Xiong , Thao H. T. Vo , Felino E. Pagaduan , Qi Xiang , Xiao-Yu Li , Glenn O'Rourke
Abstract: An integrated circuit (IC) chip package assembly apparatus and techniques for assembling IC chip packages are described. For example, a techniques for fabricating an IC package include (A) determining a first package assembly yield (PAY) across a first die pool comprising a first plurality of dies having a performance criteria within a first predefined range; (B) determining a second PAY across a second die pool comprising a second plurality of dies having a performance criteria within a second predefined range of performance criteria that is different than the first predefined range of performance criteria, the second plurality of dies comprising a portion of the first plurality of dies; and (C) generating a final assembly sequence in response to analyzing the first and second PAYs, the final assembly sequence comprising rules for combining dies in accordance with obtaining a higher of the first PAY and the second PAY.