Data flow graph refinement using range set information for improved synthesis

    公开(公告)号:US11755801B1

    公开(公告)日:2023-09-12

    申请号:US17107367

    申请日:2020-11-30

    Applicant: Xilinx, Inc.

    CPC classification number: G06F30/3312

    Abstract: Implementing a circuit design within an integrated circuit can include converting the circuit design, specified in a hardware description language, into a data flow graph and creating range set data structures in a memory. The range set data structures correspond to nodes of the data flow graph. Each range set data structure can be initialized with a range of values the corresponding node can take as specified by the circuit design. The method can include determining actual values the nodes are capable of taking by propagating the values through the data flow graph. The range set data structures are updated to store the actual values for the corresponding nodes. The method also can include modifying a selected node of the data flow graph based on the actual values stored in the range set data structure of the selected node and semantics of the selected node.

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