Abstract:
An information processing apparatus including, non-volatile memory device, non-volatile memory device and methods thereof. The non-volatile memory device outputs a signal indicating to an external device whether a next command may be executed without a processing interruption. The signal may be based on whether the non-volatile memory device is executing a command when the next command is received.
Abstract:
A defective address storage circuit reduces current consumption in a memory device by utilizing a fuse block having address storage blocks arranged in series. Each address storage block preferably has two portions, each portion having a fuse and transistor. A NAND-type architecture can be implemented by arranging the portions of each block in parallel while the fuse and transistor are arranged in series, or by arranging the portions of each block in series while the fuse and transistor are arranged in parallel.