摘要:
Methods and apparatus are provided for modulation coding of input data. In a first scheme, a modulation encoder applies a modulation code to input data to produce an (L,K)-constrained encoded bit-sequence, where K is maximum run-length of 0's, and L is the maximum run-length of 0's in each of the odd and even interleaves of the encoded bit-sequence. Then, a precoder effects 1/(1⊕D4) preceding of the encoded bit-sequence. In a second scheme, a modulation encoder applies a modulation code to the input data to produce a K-constrained encoded bit-sequence. In this scheme, a precoder then effects 1/(1⊕D⊕D2⊕D3) preceding of the encoded bit-sequence. In both schemes, the effect of the precoder is to produce a precoded sequence in which, in addition to other constraints, the maximum length of the variable frequency oscillator pattern is constrained to a predetermined value CVFO.
摘要:
A method and apparatus for data coding for high-density recording channels exhibiting low frequency contents is disclosed. Coding is used that satisfies both Running Digital Sum (RDS) and Maximum Transition Run (MTR) properties, which are desirable for achieving high-density recording for recording channels exhibiting low frequency components such as perpendicular magnetic recording channel.
摘要:
A system and method for the wireless transmission of data packets in a code division multiple access communication system wherein one of the code division multiple access channels (PRCH) is used in a time-shared fashion for the transmission of the data packets from several transmitting stations (MSy, MSz) to a receiving station (BS). A request is sent from a transmitting station (MSy) to the corresponding receiving station (BS) of the communication system indicating the destination address to which data packet(s) are to be routed. Then, registering the transmitting station (MSy) and assigning an unique virtual connection identifier (VCIy) to it. Next, the transmitting station (MSy) is attached to the code division multiple access channel (PRCH) used for the transmission of data packets. Then, listening to the downlink of the code division multiple access channel (PRCH) used for the transmission of data packets until the corresponding receiving station (BS) broadcasts that it will be “idle” such that a random access to the code division multiple access channel (PRCH) used for the transmission of data packets is allowed in the next frame. Next, the transnmission power of the transmitting station (MSy) is ramped up during the next frame until a certain power level is reached. The data packet(s) and the virtual connection identifier (VCIy) are transmitted over the uplink of the code division multiple access channel (PRCH) used for the transmission of data packets to the receiving station (BS). The data packet(s) are routed to the destination address. Access to the code division multiple access channel (PRCH) used for the transmission of data packets is controller by a multiple access protocol based on carrier sensing and collision detection (CSMA/CD).
摘要:
In data transmission and storage using encoding through finite-state machines, the feedback link that updates each finite-state machine after each encoding step presents a bottleneck for a high speed implementation. The invention solves this problem for a class of finite-state machines that includes the encoder for the known 8B/10B Widmer-Franaszek code. The architecture consists of parallel finite-state units that are pipelined to run at a relatively low clock frequency. State updating is broken down into a feedforward part and a feedback part. In the feedback part, the state of each unit can be updated with a single operation. This allows efficient implementation of the finite-state encoder for practically any data rate just by appropriate pipelining and parallel processing.
摘要:
For encoding a stream of k-bit data bytes into a stream of m-bit code bytes satisfying given constraints, a coding principle and coder apparatus are disclosed which allow pipelined and parallel handling of the byte stream. Each data byte DB and an associated coder state indicator S are together converted into a code byte CB. The coder state indicator S(i) to be associated with a data byte DB(i) is obtained by logically combining the coder state indicator S(i-1) of the preceding data byte DB(i-1) and a state transition indicator T(i-1) derived from the latter. This allows the simultaneous generation of all coder state indicators S for a whole group (a word) of data bytes, thereby enabling the parallel and pipelined operation of the coder.