公开(公告)号：US20150069384A1

公开(公告)日：2015-03-12

申请号：US14474533

申请日：2014-09-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KOBAYASHI ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/78696

Abstract: A semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with side surfaces of the first oxide semiconductor film, side surfaces of the second oxide semiconductor film, and the top surface of the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with the top surface of the gate insulating film. A length obtained by subtracting a channel length between the source electrode and the drain electrode from a length of the second oxide semiconductor film in the channel length direction is 0.2 times to 2.0 times as long as the channel length.

Abstract translation: 半导体器件包括绝缘表面上的第一氧化物半导体膜; 第一氧化物半导体膜上的第二氧化物半导体膜; 与第一氧化物半导体膜的侧表面，第二氧化物半导体膜的侧表面和第二氧化物半导体膜的顶表面接触的源电极和漏电极; 第二氧化物半导体膜上的第三氧化物半导体膜，源电极和漏电极; 第三氧化物半导体膜上的栅极绝缘膜; 以及与栅极绝缘膜的顶表面接触的栅电极。 通过从沟道长度方向上的第二氧化物半导体膜的长度减去源电极和漏电极之间的沟道长度而获得的长度是沟道长度的0.2倍至2.0倍。

公开(公告)号：US20150021596A1

公开(公告)日：2015-01-22

申请号：US14330444

申请日：2014-07-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI

IPC: H01L29/786

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L29/0684 ,  H01L29/42384 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device is provided with a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a third oxide semiconductor film in contact with a top surface of the insulating surface, a side surface of the first oxide semiconductor film, and side and top surfaces of the second oxide semiconductor film; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with the gate insulating film and faces the top and side surfaces a of the second oxide semiconductor film. A thickness of the first oxide semiconductor film is larger than a sum of a thickness of the third oxide semiconductor film and a thickness of the gate insulating film, and the difference is larger than or equal to 20 nm.

Abstract translation: 半导体器件在绝缘表面上设置有第一氧化物半导体膜; 第一氧化物半导体膜上的第二氧化物半导体膜; 与所述绝缘表面的顶表面接触的第三氧化物半导体膜，所述第一氧化物半导体膜的侧表面以及所述第二氧化物半导体膜的侧表面和顶表面; 第三氧化物半导体膜上的栅极绝缘膜; 以及与栅极绝缘膜接触并与第二氧化物半导体膜的顶表面和侧表面a相对的栅电极。 第一氧化物半导体膜的厚度大于第三氧化物半导体膜的厚度与栅极绝缘膜的厚度的和，并且该差值大于或等于20nm。

公开(公告)号：US20140339542A1

公开(公告)日：2014-11-20

申请号：US14272867

申请日：2014-05-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masahiko HAYAKAWA ,  Daisuke MATSUBAYASHI

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device includes a dual-gate transistor in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode. In the channel width direction of the transistor, a side surface of each of the first and second gate electrodes is on the outer side of a side surface of the oxide semiconductor film. The first or second gate electrode faces the side surface of the oxide semiconductor film with the gate insulating film provided between the first or second gate electrode and the oxide semiconductor film.

Abstract translation: 半导体器件包括双栅极晶体管，其中在第一栅电极和第二栅电极之间设置氧化物半导体膜。 在晶体管的沟道宽度方向上，第一和第二栅电极的侧面位于氧化物半导体膜的侧面的外侧。 第一或第二栅极电极面对氧化物半导体膜的侧表面，其中栅极绝缘膜设置在第一或第二栅电极和氧化物半导体膜之间。

公开(公告)号：US20130270552A1

公开(公告)日：2013-10-17

申请号：US13860792

申请日：2013-04-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/7831

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.