公开(公告)号：US20170271523A1

公开(公告)日：2017-09-21

申请号：US15617696

申请日：2017-06-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US20160329436A1

公开(公告)日：2016-11-10

申请号：US15214689

申请日：2016-07-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki KOBAYASHI ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869

Abstract: A semiconductor device of one embodiment of the present invention includes a semiconductor, an insulator, a first conductor, and a second conductor. In the semiconductor device, a top surface of the semiconductor has a region in contact with the insulator; a side surface of the semiconductor has a region in contact with the insulator; the first conductor has a first region overlapping with the semiconductor with the insulator positioned therebetween; the first region has a region in contact with the top surface of the semiconductor and a region in contact with the side surface of the semiconductor; the second conductor has a second region in contact with the semiconductor; and the first region and the second region do not overlap with each other.

公开(公告)号：US20150349131A1

公开(公告)日：2015-12-03

申请号：US14723630

申请日：2015-05-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki ATSUMI ,  Yoshiyuki KOBAYASHI ,  Yutaka SHIONOIRI ,  Yuto YAKUBO ,  Shuhei NAGATSUKA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  G05F3/262 ,  H01L27/085 ,  H01L27/0886 ,  H01L27/1211 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/1606 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/7782 ,  H01L29/785 ,  H01L29/78648 ,  H01L29/78696

Abstract: A semiconductor device which occupies a small area is provided. A semiconductor device includes a resistor. The resistor includes a transistor. The increase rate of a drain current of the transistor with a 0.1 V change in drain voltage is preferably higher than or equal to 1% when the drain voltage is higher than a difference between a gate voltage and a threshold voltage of the transistor. The semiconductor device has a function of generating a voltage based on the resistance of the resistor.

Abstract translation: 提供占据小面积的半导体器件。 半导体器件包括电阻器。 电阻器包括晶体管。 当漏极电压高于晶体管的栅极电压和阈值电压之间的差时，漏极电压的0.1V变化的晶体管的漏极电流的增加率优选地高于或等于1％。 半导体器件具有基于电阻器的电阻产生电压的功能。

公开(公告)号：US20150200305A1

公开(公告)日：2015-07-16

申请号：US14593227

申请日：2015-01-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki KOBAYASHI ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869

Abstract: A semiconductor device of one embodiment of the present invention includes a semiconductor, an insulator, a first conductor, and a second conductor. In the semiconductor device, a top surface of the semiconductor has a region in contact with the insulator; a side surface of the semiconductor has a region in contact with the insulator; the first conductor has a first region overlapping with the semiconductor with the insulator positioned therebetween; the first region has a region in contact with the top surface of the semiconductor and a region in contact with the side surface of the semiconductor; the second conductor has a second region in contact with the semiconductor; and the first region and the second region do not overlap with each other.

Abstract translation: 本发明的一个实施例的半导体器件包括半导体，绝缘体，第一导体和第二导体。 在半导体器件中，半导体的顶表面具有与绝缘体接触的区域; 半导体的侧面具有与绝缘体接触的区域; 第一导体具有与半导体重叠的第一区域，绝缘体位于它们之间; 第一区域具有与半导体的顶表面接触的区域和与半导体的侧表面接触的区域; 所述第二导体具有与所述半导体接触的第二区域; 并且第一区域和第二区域彼此不重叠。

公开(公告)号：US20220328694A1

公开(公告)日：2022-10-13

申请号：US17844767

申请日：2022-06-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786 ,  H01L29/417

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US20240355930A1

公开(公告)日：2024-10-24

申请号：US18626777

申请日：2024-04-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/78696 ,  H01L29/785 ,  H01L29/7854

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US20160190347A1

公开(公告)日：2016-06-30

申请号：US15062268

申请日：2016-03-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shinya SASAGAWA ,  Motomu KURATA ,  Kazuya HANAOKA ,  Yoshiyuki KOBAYASHI ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/04

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/24 ,  H01L29/7869

Abstract: A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a source electrode layer and a drain electrode layer electrically connected to the semiconductor layer, a gate insulating film over the semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer overlapping with part of the semiconductor layer, part of the source electrode layer, and part of the drain electrode layer with the gate insulating film therebetween. A cross section of the semiconductor layer in the channel width direction is substantially triangular or substantially trapezoidal. The effective channel width is shorter than that for a rectangular cross section.

公开(公告)号：US20160013321A1

公开(公告)日：2016-01-14

申请号：US14788940

申请日：2015-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KOBAYASHI ,  Shinpei MATSUDA ,  Shunpei YAMAZAKI

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/0629 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/78696

Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.

Abstract translation: 提供具有稳定电特性的半导体器件。 晶体管包括第一至第三氧化物半导体层，栅电极和栅极绝缘层。 第二氧化物半导体层具有位于第一和第三氧化物半导体层之间的部分。 栅极绝缘层具有与第三氧化物半导体层的顶表面接触的区域。 栅电极与栅绝缘层位于其间的部分的顶表面重叠。 栅极电极在栅极绝缘层位于沟槽宽度方向上面对该部分的侧面。 第二氧化物半导体层包括厚度大于或等于2nm且小于8nm的区域。 第二氧化物半导体层的沟道宽度方向的长度小于60nm。

公开(公告)号：US20160181438A1

公开(公告)日：2016-06-23

申请号：US15057614

申请日：2016-03-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI

IPC: H01L29/786 ,  H01L29/06

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L29/0684 ,  H01L29/42384 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device is provided with a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a third oxide semiconductor film in contact with a top surface of the insulating surface, a side surface of the first oxide semiconductor film, and side and top surfaces of the second oxide semiconductor film; a gate insulating film over the third oxide semiconductor film; and a gate electrode in contact with the gate insulating film and faces the top and side surfaces a of the second oxide semiconductor film. A thickness of the first oxide semiconductor film is larger than a sum of a thickness of the third oxide semiconductor film and a thickness of the gate insulating film, and the difference is larger than or equal to 20 nm.

公开(公告)号：US20160035897A1

公开(公告)日：2016-02-04

申请号：US14812028

申请日：2015-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki KOBAYASHI ,  Shinpei MATSUDA ,  Daisuke MATSUBAYASHI ,  Hiroyuki TOMISU

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F2201/58 ,  H01L21/8221 ,  H01L27/0688 ,  H01L29/045 ,  H01L29/78696

Abstract: A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.

Abstract translation: 提供其沟道形成在具有介电各向异性的半导体中的晶体管。 提供具有小的亚阈值摆动值的晶体管。 提供具有常关电特性的晶体管。 提供了处于断开状态的具有低泄漏电流的晶体管。 半导体器件包括绝缘体，半导体和导体。 在半导体器件中，半导体包括与绝缘体位于其间的与导体重叠的区域，并且该区域在与该区域的顶表面垂直的方向上的介电常数高于该区域的方向上的介电常数 平行于顶面。