Charger circuit and PWM controller thereof
    91.
    发明申请
    Charger circuit and PWM controller thereof 有权
    充电器电路及其PWM控制器

    公开(公告)号:US20080007226A1

    公开(公告)日:2008-01-10

    申请号:US11648806

    申请日:2007-01-03

    IPC分类号: H02J7/04

    CPC分类号: H02J7/008 H02J7/0029

    摘要: A PWM controller includes a short circuit mode circuit which has input ends connecting simultaneously to a power supply input end and an output end of an output driving circuit, and an oscillator which has a temperature compensation circuit that includes a medium value multi-transistor resistor of a negative temperature coefficient and a well resistor of a positive temperature coefficient. The invention also provides a charger circuit which includes the PWM controller set forth above and a constant voltage/current control circuit coupling with the PWM controller through a transformer. A system adopted the PWM controller circuit and charger circuit of the invention does not need a voltage stabilization diode now equipped in many conventional designs. The invention provides an improved short circuit protection, eliminates low frequency harmonic waves, packages power transistors and the controller into a single TO-94, increases the cluster density and enhances the reliability of small packages.

    摘要翻译: PWM控制器包括短路模式电路,其具有同时连接到电源输入端和输出驱动电路的输出端的输入端,以及具有温度补偿电路的振荡器,该温度补偿电路包括中间值多晶体管电阻器 负温度系数和正温度系数的阱电阻。 本发明还提供一种充电器电路,其包括上述PWM控制器和通过变压器与PWM控制器耦合的恒压/电流控制电路。 采用本发明的PWM控制器电路和充电器电路的系统不需要在许多常规设计中配备的稳压二极管。 本发明提供了改进的短路保护,消除低频谐波,将功率晶体管和控制器封装成单个TO-94,增加了集群密度并提高了小封装的可靠性。

    Level shifting input buffer circuit
    92.
    发明授权
    Level shifting input buffer circuit 有权
    电平移位输入缓冲电路

    公开(公告)号:US07276953B1

    公开(公告)日:2007-10-02

    申请号:US10964040

    申请日:2004-10-13

    申请人: Tao Peng Wen Zhou

    发明人: Tao Peng Wen Zhou

    IPC分类号: H03L5/00

    CPC分类号: H03K19/018528

    摘要: An input circuit (200) operating at a predetermined power supply voltage (VPW) can level shift a high voltage input signal (VINHV) from a higher voltage value to the lower power supply voltage (VPW) level. An input circuit (200) can include input transistors (206-0 and 206-1) having a source-follower configuration. A first input transistor (206-0) receives a high voltage input signal (VINHV) and a second input transistor (206-1) receives a reference voltage (VREF), which can both reach levels greater than power supply voltage (VPW). A compare circuit (204) can reduce duty cycle distortion to generate a lower voltage input signal (VINLV). Input circuit (200) can provide level shifting from LVTTL levels to low voltage CMOS levels without the need for multiple power supply voltages.

    摘要翻译: 以预定电源电压(V BAT)操作的输入电路(200)可以将高电压输入信号(V INHV)从高电压值移位到 较低的电源电压(V SUB PW )电平。 输入电路(200)可以包括具有源跟随器配置的输入晶体管(206-0和206-1)。 第一输入晶体管(206-0)接收高电压输入信号(V INHV),第二输入晶体管(206-1)接收参考电压(V IN REF) ),其都可以达到比电源电压(V SUB PW )高的电平。 比较电路(204)可以减少占空比失真以产生较低电压输入信号(V INLV )。 输入电路(200)可以提供从LVTTL电平到低电压CMOS电平的电平转换,而不需要多个电源电压。