摘要:
A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ΔT, wherein ΔT=Tc/K, K≥2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.
摘要:
A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.
摘要:
A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.
摘要:
An integrated circuit for facilitating spread spectrum reception of data having a data bit period includes an hypothesis search circuit (120, 210, 220) operable to correlate a pseudorandom code with a signal input based on a received signal to produce correlation results, and a processor circuit (320) operable to coherently integrate the correlation results over plural sample windows (PreD1, PreD2) staggered relative to each other in the coherent integration interval and to non-coherently combine the coherently integrated results corresponding to the plural sample windows (PreD1, PreD2) to produce a received signal output, whereby enhancing performance. Other circuits, receivers and processes are also disclosed.
摘要:
The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp segment and a second ramp segment. The first ramp segment and the second ramp segment each includes a start frequency, a first frequency and a second frequency. The first frequency of the second ramp segment is equal to or greater than the second frequency of the first ramp segment when a slope of the first ramp segment and a slope of the second ramp segment are equal and positive. The first frequency of the second ramp segment is equal to or less than the second frequency of the first ramp segment when the slope of the first ramp segment and the slope of the second ramp segment are equal and negative.
摘要:
Automatic gain control in a receiver. A method for controlling operating range of an analog-to-digital converter (ADC) by an automatic gain control circuit includes estimating a peak-to-average ratio corresponding to an analog signal from digital samples of the analog signal. The method includes determining a peak value corresponding to the analog signal based on the peak-to-average ratio. Further, the method includes maintaining magnitude of the analog signal at an input of the ADC and gain of the receiver based on the peak value.
摘要:
An electronic circuit (2250) for a satellite receiver (100, 2200). The electronic circuit (2250) includes a correlator circuit (2310) operable to supply a data signal including ephemeris data and a subsequent satellite time datum, and a data processor (2370, 2380) operable to infer satellite time TS from as few as one of the ephemeris data prior to the satellite time datum. Other circuits, devices, receivers, systems, processes of operation and processes of manufacture are also disclosed.