Multiple chirp generation in a radar system

    公开(公告)号:US09921295B2

    公开(公告)日:2018-03-20

    申请号:US14586854

    申请日:2014-12-30

    IPC分类号: G01S7/282 G01S7/35 G01S13/34

    CPC分类号: G01S7/35 G01S13/34 G01S13/343

    摘要: A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.

    Multiple Chirp Generation in a Radar System
    93.
    发明申请
    Multiple Chirp Generation in a Radar System 有权
    雷达系统中的多个啁啾声发生

    公开(公告)号:US20160187462A1

    公开(公告)日:2016-06-30

    申请号:US14586854

    申请日:2014-12-30

    IPC分类号: G01S7/28 G01S13/02

    CPC分类号: G01S7/35 G01S13/34 G01S13/343

    摘要: A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.

    摘要翻译: 提供一种雷达装置,其包括定时控制部件,所述定时控制部件可操作以根据啁啾配置参数的一组啁啾配置参数的每个啁啾和啁啾啁啾分布来产生啁啾控制信号,以使雷达装置发送 啁啾,具有啁啾配置参数输入,啁啾剖面参数输入,啁啾地址输出和啁啾控制信号输出的定时控制组件,啁啾配置存储组件,其具有连接到定时的配置参数输入的相应输入的啁啾配置参数输出 控制组件,啁啾配置文件地址输出和耦合到啁啾地址输出的啁啾地址输入,以及啁啾配置文件存储组件,其具有耦合到定时控制组件的啁啾剖面参数输入的啁啾分布参数输出; 以及耦合到啁啾配置文件地址输出的啁啾配置文件地址输入。

    RANGE RESOLUTION IN FMCW RADARS
    95.
    发明申请
    RANGE RESOLUTION IN FMCW RADARS 审中-公开
    FMCW雷达中的范围分辨率

    公开(公告)号:US20160061942A1

    公开(公告)日:2016-03-03

    申请号:US14470414

    申请日:2014-08-27

    IPC分类号: G01S13/02 G01S13/58 G01S7/35

    摘要: The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp segment and a second ramp segment. The first ramp segment and the second ramp segment each includes a start frequency, a first frequency and a second frequency. The first frequency of the second ramp segment is equal to or greater than the second frequency of the first ramp segment when a slope of the first ramp segment and a slope of the second ramp segment are equal and positive. The first frequency of the second ramp segment is equal to or less than the second frequency of the first ramp segment when the slope of the first ramp segment and the slope of the second ramp segment are equal and negative.

    摘要翻译: 本公开提供了一种用于估计障碍物的范围的雷达装置。 雷达装置包括产生第一斜坡段和第二斜坡段的本地振荡器。 第一斜坡段和第二斜坡段各自包括起始频率,第一频率和第二频率。 当第一斜坡段的斜率和第二斜坡段的斜率相等且为正时,第二斜坡段的第一频率等于或大于第一斜坡段的第二频率。 当第一斜坡段的斜率和第二斜坡段的斜率相等且为负时,第二斜坡段的第一频率等于或小于第一斜坡段的第二频率。

    RECEIVERS, CIRCUITS, AND METHODS TO IMPROVE GNSS TIME-TO-FIX AND OTHER PERFORMANCES
    97.
    发明申请
    RECEIVERS, CIRCUITS, AND METHODS TO IMPROVE GNSS TIME-TO-FIX AND OTHER PERFORMANCES 审中-公开
    接收机,电路和方法,以改进全球定位系统时间到时间和其他性能

    公开(公告)号:US20130227377A1

    公开(公告)日:2013-08-29

    申请号:US13860907

    申请日:2013-04-11

    IPC分类号: G06F11/10

    CPC分类号: G06F11/10 G01S19/27

    摘要: An electronic circuit (2250) for a satellite receiver (100, 2200). The electronic circuit (2250) includes a correlator circuit (2310) operable to supply a data signal including ephemeris data and a subsequent satellite time datum, and a data processor (2370, 2380) operable to infer satellite time TS from as few as one of the ephemeris data prior to the satellite time datum. Other circuits, devices, receivers, systems, processes of operation and processes of manufacture are also disclosed.

    摘要翻译: 一种用于卫星接收机(100,2200)的电子电路(2250)。 电子电路(2250)包括可操作以提供包括星历数据和随后的卫星时间数据的数据信号的相关器电路(2310),以及数据处理器(2370,2808),其可操作以从至少一个 在卫星时间基准之前的星历数据。 还公开了其它电路,设备,接收器,系统,操作过程和制造过程。