Method of manufacturing a color filter substrate for in-plane switching mode liquid crystal display device
    101.
    发明授权
    Method of manufacturing a color filter substrate for in-plane switching mode liquid crystal display device 有权
    制造面内切换模式液晶显示装置的滤色器基板的方法

    公开(公告)号:US06900867B2

    公开(公告)日:2005-05-31

    申请号:US09735519

    申请日:2000-12-14

    Applicant: Jin Seok Lee

    Inventor: Jin Seok Lee

    CPC classification number: G02F1/134363 G02F1/133514

    Abstract: In a method of manufacturing a color filter for an in-plane switching mode liquid crystal display a black matrix for light-shielding and color filter layers of red, green and blue are formed on a glass substrate and an overcoat layer is coated thereon for minimizing a stepped difference of an overlapped part between the black matrix and the color filter layers, the overcoat layer being formed of a non-exposing type material.

    Abstract translation: 在制造面内切换模式液晶显示器的滤色器的方法中,在玻璃基板上形成用于遮光的黑色矩阵和用​​于红色,绿色和蓝色的滤色器层,并且在其上涂覆外涂层以最小化 黑色矩阵和滤色器层之间的重叠部分的阶梯差,外涂层由非曝光型材料形成。

    Integrated circuit memory devices having dummy memory cells therein for
inhibiting memory failures
    102.
    发明授权
    Integrated circuit memory devices having dummy memory cells therein for inhibiting memory failures 失效
    具有用于抑制存储器故障的虚拟存储器单元的集成电路存储器件

    公开(公告)号:US5867434A

    公开(公告)日:1999-02-02

    申请号:US912486

    申请日:1997-08-18

    CPC classification number: H01L27/10897

    Abstract: Integrated circuit memory devices contain an array of active memory cells and at least one column of dummy memory cells having missing electrical connections to either a dummy bit line and/or respective storage electrodes. The dummy memory cells are provided with missing electrical connections so that formation of stray electrical "shorts" between storage electrodes of dummy and active memory cells during fabrication do not cause memory failures when the memory devices are installed. In particular, integrated circuit memory devices are provided which comprise an array of active DRAM memory cells and a column of dummy DRAM memory cells. The active DRAM memory cells each contain electrical connections to a respective active bit line and a respective storage electrode, but the dummy DRAM memory cells are each devoid of an electrical connection to a dummy bit line and/or a respective storage electrode. Accordingly, the formation of a stringer (e.g., electrical short) between a storage capacitor of an active memory cell and a dummy memory cell does not result in a memory failure even if the word line coupled to the dummy memory cell is activated and the dummy bit line is biased at a potential which is different from the potential of the storage capacitor of the active memory cell.

    Abstract translation: 集成电路存储器件包含有效存储器单元的阵列和至少一列虚拟存储器单元,其具有与虚拟位线和/或相应存储电极的缺失的电连接。 虚拟存储器单元被提供有缺失的电连接,使得在制造期间在虚拟存储单元和有源存储单元的存储电极之间形成杂散电“短路”在安装存储器件时不会引起存储器故障。 特别地,提供了包括有源DRAM存储器单元阵列和虚拟DRAM存储器单元的列的集成电路存储器件。 有源DRAM存储单元各自包含与相应的有源位线和相应的存储电极的电连接,但虚拟DRAM存储单元各自没有与虚拟位线和/或相应存储电极的电连接。 因此,即使连接到虚拟存储器单元的字线被激活,在活动存储单元的存储电容器和虚拟存储单元之间形成纵梁(例如电短路)也不会导致存储器故障,并且虚拟 位线偏置于与有源存储单元的存储电容器的电位不同的电位。

    Apparatus and method for improving stability of transmitting frequency
by using costas loop section in communication system of half duplex
transmitting method
    103.
    发明授权
    Apparatus and method for improving stability of transmitting frequency by using costas loop section in communication system of half duplex transmitting method 失效
    通过半双工传输方式的通信系统中的costas loop section提高发射频率的稳定性的装置和方法

    公开(公告)号:US5828709A

    公开(公告)日:1998-10-27

    申请号:US525092

    申请日:1995-09-08

    Applicant: Jin Seok Lee

    Inventor: Jin Seok Lee

    CPC classification number: H04L27/2273 H03L7/087 H04L2027/0057 H04L2027/0065

    Abstract: An apparatus and a method for improving the stability of the transmitting frequency by using a costas loop section in a communication system of a half duplex transmitting method is disclosed, in which a receiving terminal is provided with an A/D converter, a D/A converter, a switching circuit, and a central processing unit, and thus, during a data transmission, a reference frequency is extracted through the costas loop section without installing a separate reference frequency extracting facility, thereby improving the stability of the transmitting frequency. In the conventional technique, in forming a reference frequency for a transmitting frequency, additional devices such as a pilot signal detector, a transmission reference frequency oscillator and the like are required, with the result that the cost for establishing the system becomes high, and that too much man hours and too many additional components are required. However, in the present invention, low cost facilities such as A/D and D/A converters, a switch circuit and a central processing unit are installed to the costas loop of the currently used receiving terminal, so that a transmitting reference frequency can be extracted from the data carrying carrier waves through the costas loop without using the high cost conventional reference frequency extracting facility, thereby improving the stability of the transmitting frequency.

    Abstract translation: 公开了一种通过在半双工发送方式的通信系统中使用costas环路部分来提高发送频率的稳定性的装置和方法,其中接收终端设置有A / D转换器,D / A 转换器,开关电路和中央处理单元,因此,在数据传输期间,通过Costas环路部分提取参考频率,而不安装单独的参考频率提取设备,从而提高发射频率的稳定性。 在现有技术中,在形成发送频率的基准频率的情况下,需要诸如导频信号检测器,发送基准频率振荡器等附加装置,结果是建立系统的成本变高,并且 太多的工时,需要太多的附加部件。 然而,在本发明中,诸如A / D和D / A转换器的低成本设施,开关电路和中央处理单元安装在当前使用的接收终端的成本环中,使得发送参考频率可以 从携带载波的数据通过costas循环提取而不使用高成本的常规参考频率提取设备,从而提高发射频率的稳定性。

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