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101.发明申请公开(公告)号：US20240420642A1
公开(公告)日：2024-12-19
申请号：US17771594
申请日：2020-11-24
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A shift register circuit includes an input sub-circuit, an output sub-circuit, a control sub-circuit and a compensation sub-circuit. The input sub-circuit is configured to, under control of a first input signal received at a first input signal terminal, transmit the first input signal to a pull-up node. The output sub-circuit is configured to transmit a first clock signal received at a first clock signal terminal to a first signal output terminal under control of a voltage at the pull-up node. The control sub-circuit is configured to transmit a voltage at a first reference node to the pull-up node under control of a first control signal received at a first control signal terminal. The compensation sub-circuit is configured to transmit a voltage at a seventh node to the pull-up node under control of a seventh clock signal received at a seventh clock signal terminal.
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公开(公告)号：US20240395198A1
公开(公告)日：2024-11-28
申请号：US18262121
申请日：2022-05-30
Inventor： Liu WU , Xuehuan FENG , Yongqian LI
IPC: G09G3/3233 , G11C19/28
Abstract: A pixel circuit includes: a driving sub-circuit, a sensing sub-circuit, a light-emitting control sub-circuit, a sensing control sub-circuit, a light-emitting device and a sensing terminal. The driving sub-circuit includes a first terminal and a second terminal coupled to the light-emitting device, and is configured to write a data signal into the driving sub-circuit in response to a first scan signal and control an electrical signal flowing through the driving sub-circuit according to the data signal. The sensing sub-circuit is configured to connect the second terminal to the sensing terminal in response to a second scan signal. The light-emitting control sub-circuit is configured to connect a first voltage terminal to the first terminal in response to a light-emitting control signal. The sensing control sub-circuit is configured to connect a second voltage terminal to the first terminal in response to a sensing control signal provided by a sensing control terminal.
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公开(公告)号：US20240296793A1
公开(公告)日：2024-09-05
申请号：US18026827
申请日：2022-06-14
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/08
Abstract: Provided is a display panel. The display panel includes: a substrate; a plurality of first control lines and a plurality of second control lines on a side of the substrate; and a plurality of subpixels arranged in an array on the side of the substrate, wherein at least two of the plurality of subpixels share a first node; wherein the subpixel includes a first circuit and a second circuit, the first circuit and the second circuit being configured to control a voltage at the first node in response to a first control signal and a second control signal; wherein in the display panel, a sum of a number of the plurality of first control lines and a number of the plurality of second control lines is less than or equal to a number of the subpixels in a column direction.
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公开(公告)号：US20240257712A1
公开(公告)日：2024-08-01
申请号：US18005017
申请日：2021-08-20
Inventor： Xuehuan FENG , Yongqian LI
CPC classification number: G09G3/32 , G11C19/28 , G09G2310/0267 , G09G2310/0286 , G09G2330/021
Abstract: A shift resister includes a first scan unit and a black insertion circuit. The first scan unit includes a first input circuit and a first output circuit. The first input circuit is configured to transmit a display input signal to a first pull-up node. The first output circuit is configured to, in a case where the first input circuit transmits the display input signal to the first pull-up node, transmit a first clock signal to a first scan signal terminal. The black insertion circuit is configured to transmit a black insertion input signal to the first pull-up node. The first output circuit is further configured to, in a case where the black insertion circuit transmits the black insertion input signal to the first pull-up node, transmit the first clock signal to the first scan signal terminal.
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公开(公告)号：US20240242680A1
公开(公告)日：2024-07-18
申请号：US18618413
申请日：2024-03-27
Inventor： Xuehuan FENG , Yongqian LI , Hao LIU
IPC: G09G3/3266 , G09G3/3225 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/3225 , G11C19/28 , G09G2310/0286
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit includes a first input circuit and a first output circuit; the second sub-circuit includes a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.
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Patent Agency Ranking
公开(公告)号：US20240169925A1
公开(公告)日：2024-05-23
申请号：US17779164
申请日：2021-03-29
Inventor： Zhidong YUAN , Pan XU , Yongqian LI , Can YUAN , Zhongyuan WU
IPC: G09G3/3266 , G09G3/32 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/32 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.
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107.发明公开公开(公告)号：US20240153571A1
公开(公告)日：2024-05-09
申请号：US17776306
申请日：2021-05-26
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G11C19/28 , G09G3/3225
CPC classification number: G11C19/28 , G09G3/3225 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A shift register includes: an input circuit electrically connected to a first clock signal terminal, a first voltage signal terminal and a first node; a first output circuit electrically connected to the first node, a second clock signal terminal and a scanning signal terminal; a first control circuit electrically connected to a third clock signal terminal, a fourth clock signal terminal, a fifth clock signal terminal and the first node; a second control circuit electrically connected to a sixth clock signal terminal, a second voltage signal terminal, the first node, the first voltage signal terminal and a second node; a third control circuit electrically connected to the first node, the second voltage signal terminal, the third clock signal terminal and the second node; and a second output circuit electrically connected to the second node, the second voltage signal terminal and the scanning signal terminal.
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108.发明公开公开(公告)号：US20240087661A1
公开(公告)日：2024-03-14
申请号：US17766828
申请日：2021-04-15
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN
CPC classification number: G11C19/28 , G09G3/32 , G09G2300/0426 , G09G2310/0286 , G09G2310/08
Abstract: A shift register unit and a control method thereof, a gate driving circuit, and a display device are provided. The shift register unit comprises: a first control circuit (110) and an energy storage circuit (150), which directly control the potential of a first node (Q1); a pull-down control circuit (120), a second control circuit (130) and a first pull-down circuit (140), which indirectly control the potential of the first node (Q1); and an output circuit (160), which outputs, under the control of the potential of the first node (Q1), a first voltage signal provided by a first voltage end (VDD) to a signal output end. By means of the shift register unit, the control method thereof and the gate drive circuit, the pulse width of a gate scanning signal can be adjusted, thereby meeting various display requirements.
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公开(公告)号：US20240078978A1
公开(公告)日：2024-03-07
申请号：US18262124
申请日：2022-08-05
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Luke DING
IPC: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/38
CPC classification number: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/1201 , H10K59/1213 , H10K59/1216 , H10K59/1315 , H10K59/38 , G09G2300/0842
Abstract: A display substrate including a base substrate and a plurality of pixel units on the base substrate. Each pixel unit includes: a plurality of sub-pixels and at least one scanning line. The plurality of sub-pixels are arranged sequentially in a first direction, each sub-pixels includes a sub-pixel driving circuit and a light-emitting element, and the sub-pixel driving circuit is coupled to the light-emitting element. Each scanning line includes a first scanning conductive layer and a second scanning conductive layer arranged in a laminated manner, the first scanning conductive layer is coupled to the second scanning conductive layer, the first scanning conductive layer includes at least a portion extending in the first direction, and the first scanning conductive layer is coupled to a plurality of sub-pixel driving circuits in the plurality of sub-pixels.
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公开(公告)号：US20240057418A1
公开(公告)日：2024-02-15
申请号：US18492194
申请日：2023-10-23
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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