公开(公告)号：US06472926B2

公开(公告)日：2002-10-29

申请号：US09760639

申请日：2001-01-17

申请人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Mako Kobayashi ,  Mihoko Akiyama ,  Nobuyuki Fujii

发明人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Mako Kobayashi ,  Mihoko Akiyama ,  Nobuyuki Fujii

IPC分类号： G05F110

CPC分类号： G11C5/145 ,  G11C11/4074 ,  H02M3/073 ,  H02M2001/0032 ,  Y02B70/16

摘要： A plurality of pump modules are provided, the number of pump modules to be activated is changed depending on a mode of operation, and the number of pump modules to be activated is also adjusted with the specification of interest taken into consideration. There can be provided an internal voltage generation circuit occupying a small area and readily capable of accommodating a change in specification.

摘要翻译： 提供多个泵模块，根据操作模式改变待激活的泵模块的数量，并且还考虑要考虑的兴趣规格来调整要激活的泵模块的数量。 可以提供占用小面积并且容易适应规格变化的内部电压产生电路。

公开(公告)号：US06373763B1

公开(公告)日：2002-04-16

申请号：US09839403

申请日：2001-04-23

申请人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Nobuyuki Fujii ,  Mako Okamoto

发明人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Nobuyuki Fujii ,  Mako Okamoto

IPC分类号： G11C700

CPC分类号： G11C7/12 ,  G11C11/4074 ,  G11C11/4085 ,  G11C11/4094

摘要： An equalizing circuit includes a plurality of N-channel MOS transistors for respectively setting a data line to a predetermined precharge voltage. The H-level voltage Vddb of a control signal for turning on these N-channel MOS transistors is set to a range higher than the sum of the precharge voltage and a transistor threshold voltage. A Vddb generation circuit steps up an external power-supply voltage and sets a voltage Vddb in a range lower than a step-up voltage for activating a word line.

摘要翻译： 均衡电路包括用于分别将数据线设置为预定预充电电压的多个N沟道MOS晶体管。 用于接通这些N沟道MOS晶体管的控制信号的H电平电压Vddb被设置为高于预充电电压和晶体管阈值电压之和的范围。 Vddb生成电路升高外部电源电压，并将电压Vddb设置在低于用于激活字线的升压电压的范围内。

公开(公告)号：US06184744B2

公开(公告)日：2001-02-06

申请号：US09149079

申请日：1998-09-08

申请人： Fukashi Morishita

发明人： Fukashi Morishita

IPC分类号： G05F110

CPC分类号： G05F1/465

摘要： An internal power supply voltage generation circuit includes a main amplifier that supplies a current from an external power supply node to an internal power supply line in accordance with the difference between a reference voltage from a reference voltage generation circuit and an internal power supply voltage on the internal power supply line. The current supply amount by the main amplifier is adjusted by a level adjust circuit, according to the difference between the external power supply voltage and the reference voltage. The internal power supply voltage generation circuit can suppress reduction in the internal power supply voltage in the vicinity of the lower limit area of the differential power supply voltage.