公开(公告)号：US06700434B2

公开(公告)日：2004-03-02

申请号：US09879914

申请日：2001-06-14

申请人： Nobuyuki Fujii ,  Fukashi Morishita ,  Mihoko Akiyama ,  Akira Yamazaki ,  Mako Kobayashi ,  Yasuhiko Taito

发明人： Nobuyuki Fujii ,  Fukashi Morishita ,  Mihoko Akiyama ,  Akira Yamazaki ,  Mako Kobayashi ,  Yasuhiko Taito

IPC分类号： G05F1575

CPC分类号： G05F3/205 ,  H03K3/0315 ,  H03K3/354

摘要： Oscillation outputs which are different for respective detector signals output from a first detector circuit and a second detector circuit, are obtained from a first ring oscillator and a second ring oscillator respectively corresponding to the detector circuits. A selector selects and outputs one of the oscillation outputs. Accordingly, it is sufficient to provide only one pump circuit in a circuit producing a substrate bias voltage.

摘要翻译： 从分别对应于检测器电路的第一环形振荡器和第二环形振荡器获得对从第一检测器电路和第二检测器电路输出的相应检测器信号不同的振荡输出。 选择器选择并输出其中一个振荡输出。 因此，在产生衬底偏置电压的电路中仅提供一个泵电路就足够了。

公开(公告)号：US06515934B2

公开(公告)日：2003-02-04

申请号：US09986973

申请日：2001-11-13

申请人： Mako Kobayashi ,  Fukashi Morishita

发明人： Mako Kobayashi ,  Fukashi Morishita

IPC分类号： G11C700

CPC分类号： G11C5/145 ,  G11C8/18

摘要： When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.

公开(公告)号：US06333669B1

公开(公告)日：2001-12-25

申请号：US09191122

申请日：1998-11-13

申请人： Mako Kobayashi ,  Fukashi Morishita

发明人： Mako Kobayashi ,  Fukashi Morishita

IPC分类号： G01R2306

CPC分类号： G05F1/465

摘要： The voltage converting circuit 10 includes a standby VDC, an active VDC which operates when the semiconductor integrated circuit device is activated and has current drivability larger than that of standby VDC, and a drivability control circuit. Drivability control circuit generates a control signal in accordance with operational frequency of the semiconductor integrated circuit device. Current drivability of the active the VDC is controlled in accordance with the operational frequency by the control signal.

摘要翻译： 电压转换电路10包括待机VDC，当半导体集成电路器件被激活并且具有大于备用VDC的电流驱动能力时工作的有源VDC和驾驶性能控制电路。 可驱动性控制电路根据半导体集成电路器件的工作频率产生控制信号。 根据操作频率由控制信号控制有源VDC的电流驱动能力。

公开(公告)号：US06424134B1

公开(公告)日：2002-07-23

申请号：US09759321

申请日：2001-01-16

申请人： Fukashi Morishita ,  Akira Yamazaki ,  Yasuhiko Taito ,  Nobuyuki Fujii ,  Mihoko Akiyama ,  Mako Kobayashi

发明人： Fukashi Morishita ,  Akira Yamazaki ,  Yasuhiko Taito ,  Nobuyuki Fujii ,  Mihoko Akiyama ,  Mako Kobayashi

IPC分类号： G05F316

摘要： A semiconductor device includes a constant voltage generation circuit generating a constant voltage commonly to reference voltages corresponding to a plurality of internal voltages. The plurality of reference voltages are generated from the common constant voltage. Thus, the semiconductor device for generating internal voltages is implemented, which allows reduction in layout area and decrease in test time for voltage adjustment.

公开(公告)号：US06392472B1

公开(公告)日：2002-05-21

申请号：US09954218

申请日：2001-09-18

申请人： Mako Kobayashi ,  Fukashi Morishita

发明人： Mako Kobayashi ,  Fukashi Morishita

IPC分类号： G05F1575

CPC分类号： G05F1/465

摘要： A voltage generation circuit includes a digital type VDC. The digital VDC includes a differential amplify circuit amplifying a voltage deviation of a reference voltage signal from a detection voltage signal to output the amplified voltage to a control node, a signal conversion circuit providing either an H level or an L level according to the voltage level of the control node, and an output transistor connecting an external power supply line and an internal power supply voltage node according to an output voltage of the signal conversion circuit. The center of the range of the varying voltage level of the control node is set by shifting to the logic threshold value of the signal conversion circuit.

摘要翻译： 电压产生电路包括数字型VDC。 数字VDC包括差分放大电路，放大参考电压信号与检测电压信号的电压偏差，以将放大的电压输出到控制节点，信号转换电路根据电压电平提供H电平或L电平 以及根据所述信号转换电路的输出电压连接外部电源线和内部电源电压节点的输出晶体管。 通过转移到信号转换电路的逻辑阈值来设定控制节点的变化电压电平的范围的中心。

公开(公告)号：US5914907A

公开(公告)日：1999-06-22

申请号：US122760

申请日：1998-07-27

申请人： Mako Kobayashi ,  Tetsushi Tanizaki ,  Kazutami Arimoto ,  Teruhiko Amano ,  Takeshi Fujino ,  Takahiro Tsuruda ,  Fukashi Morishita ,  Mitsuya Kinoshita

发明人： Mako Kobayashi ,  Tetsushi Tanizaki ,  Kazutami Arimoto ,  Teruhiko Amano ,  Takeshi Fujino ,  Takahiro Tsuruda ,  Fukashi Morishita ,  Mitsuya Kinoshita

IPC分类号： G11C29/04 ,  G11C29/00 ,  G11C29/42 ,  G11C8/00 ,  G11C7/00

CPC分类号： G11C29/80 ,  G11C29/84

摘要： Regular memory cell arrays are arranged in divided regions in three rows and three columns except for the region located at the second row and the second column. The region located at the intersection of the second row and the second column is provided with a redundant memory cell array. The replacement operation of the regular memory cell arrays with the redundant memory cell array is provided for each memory cell block.

摘要翻译： 常规存储单元阵列被布置在除了位于第二行和第二列的区域之外的三行和三列的分割区域中。 位于第二行和第二列的交叉点的区域设置有冗余存储单元阵列。 为每个存储单元块提供具有冗余存储单元阵列的常规存储单元阵列的替换操作。

公开(公告)号：US06472926B2

公开(公告)日：2002-10-29

申请号：US09760639

申请日：2001-01-17

申请人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Mako Kobayashi ,  Mihoko Akiyama ,  Nobuyuki Fujii

发明人： Yasuhiko Taito ,  Akira Yamazaki ,  Fukashi Morishita ,  Mako Kobayashi ,  Mihoko Akiyama ,  Nobuyuki Fujii

IPC分类号： G05F110

CPC分类号： G11C5/145 ,  G11C11/4074 ,  H02M3/073 ,  H02M2001/0032 ,  Y02B70/16

摘要： A plurality of pump modules are provided, the number of pump modules to be activated is changed depending on a mode of operation, and the number of pump modules to be activated is also adjusted with the specification of interest taken into consideration. There can be provided an internal voltage generation circuit occupying a small area and readily capable of accommodating a change in specification.

摘要翻译： 提供多个泵模块，根据操作模式改变待激活的泵模块的数量，并且还考虑要考虑的兴趣规格来调整要激活的泵模块的数量。 可以提供占用小面积并且容易适应规格变化的内部电压产生电路。

公开(公告)号：US06337506B2

公开(公告)日：2002-01-08

申请号：US09116887

申请日：1998-07-16

申请人： Fukashi Morishita ,  Teruhiko Amano ,  Kazutami Arimoto ,  Tetsushi Tanizaki ,  Takeshi Fujino ,  Takahiro Tsuruda ,  Mitsuya Kinoshita ,  Mako Kobayashi

发明人： Fukashi Morishita ,  Teruhiko Amano ,  Kazutami Arimoto ,  Tetsushi Tanizaki ,  Takeshi Fujino ,  Takahiro Tsuruda ,  Mitsuya Kinoshita ,  Mako Kobayashi

IPC分类号： H01L2900

CPC分类号： H01L23/552 ,  G11C5/14 ,  H01L21/761 ,  H01L23/585 ,  H01L27/0203 ,  H01L27/092 ,  H01L2924/0002 ,  H01L2924/00

摘要： A power supply circuit and an oscillation circuit or the like of noise generation sources are concentrated, and the periphery thereof is surrounded by a guard ring. Guard ring is provided to have bonding pads at least partially thereon. Guard ring is effectively provided utilizing the region below bonding pads, so that effective noise reduction is achieved while preventing increase in chip area.

摘要翻译： 噪声产生源的电源电路和振荡电路等被集中，其周边被保护环包围。 提供保护环以至少部分地具有接合焊盘。 利用焊盘下方的区域有效地提供保护环，从而在防止芯片面积的增加的同时实现有效的降噪。

公开(公告)号：US06768354B2

公开(公告)日：2004-07-27

申请号：US09780477

申请日：2001-02-12

申请人： Akira Yamazaki ,  Fukashi Morishita ,  Yasuhiko Taito ,  Nobuyuki Fujii ,  Mihoko Akiyama ,  Mako Kobayashi

发明人： Akira Yamazaki ,  Fukashi Morishita ,  Yasuhiko Taito ,  Nobuyuki Fujii ,  Mihoko Akiyama ,  Mako Kobayashi

IPC分类号： H03L700

CPC分类号： G11C5/143 ,  G11C5/14 ,  H03K3/356113 ,  H03K17/223

摘要： With power-on detection circuits provided for a plurality of power supply voltages, a main power-on detection signal is maintained at the active state to reset an internal node while at least one of the power-on detection signals is active. In a multi-power semiconductor integrated circuit device, current consumption at the time of power-up is reduced.

摘要翻译： 通过为多个电源电压提供电源接通检测电路，主电源接通检测信号保持在激活状态，以便在至少一个通电检测信号有效时复位内部节点。 在多功率半导体集成电路器件中，上电时的电流消耗降低。

公开(公告)号：US06515461B2

公开(公告)日：2003-02-04

申请号：US09764129

申请日：2001-01-19

申请人： Mihoko Akiyama ,  Fukashi Morishita ,  Akira Yamazaki ,  Yasuhiko Taito ,  Mako Kobayashi ,  Nobuyuki Fujii

发明人： Mihoko Akiyama ,  Fukashi Morishita ,  Akira Yamazaki ,  Yasuhiko Taito ,  Mako Kobayashi ,  Nobuyuki Fujii

IPC分类号： G05F316

CPC分类号： G05F1/465

摘要： In a VDC circuit, a differential amplifier compares a first reference potential with an internal supply potential to generate a control signal according to a result of the comparison. A constant current source transistor receives at its gate a second reference potential supplied through a path different from that of the first reference potential to operate for controlling an operation current value of the differential amplifier. A drive transistor changes conductance between a node for outputting the internal supply potential and a supply potential according to the control signal.