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公开(公告)号：US20240078978A1
公开(公告)日：2024-03-07
申请号：US18262124
申请日：2022-08-05
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Luke DING
IPC: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/12 , H10K59/121 , H10K59/131 , H10K59/38
CPC classification number: G09G3/3266 , G09G3/3233 , G09G3/3275 , H10K59/1201 , H10K59/1213 , H10K59/1216 , H10K59/1315 , H10K59/38 , G09G2300/0842
Abstract: A display substrate including a base substrate and a plurality of pixel units on the base substrate. Each pixel unit includes: a plurality of sub-pixels and at least one scanning line. The plurality of sub-pixels are arranged sequentially in a first direction, each sub-pixels includes a sub-pixel driving circuit and a light-emitting element, and the sub-pixel driving circuit is coupled to the light-emitting element. Each scanning line includes a first scanning conductive layer and a second scanning conductive layer arranged in a laminated manner, the first scanning conductive layer is coupled to the second scanning conductive layer, the first scanning conductive layer includes at least a portion extending in the first direction, and the first scanning conductive layer is coupled to a plurality of sub-pixel driving circuits in the plurality of sub-pixels.
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122.发明公开公开(公告)号：US20240071284A1
公开(公告)日：2024-02-29
申请号：US17766696
申请日：2021-06-29
IPC: G09G3/20 , G09G3/3233
CPC classification number: G09G3/2096 , G09G3/2074 , G09G3/3233 , G09G2300/0842 , G09G2320/0233 , G09G2360/16
Abstract: A method for driving a display panel is provided. The method includes receiving image data of a frame of image, the image data including a plurality of initial grayscale values respectively for a plurality of subpixels in the display panel; and converting the image data into a converted image data including a plurality of converted grayscale values respectively for the plurality of subpixels. Converting the image data includes compensating a respective initial grayscale value for a respective subpixel by at least a respective delay-compensating factor to obtain a respective converted grayscale value. With respect to a p-th subpixel and a q-th subpixel respectively connected to a respective data line and having a same initial grayscale values, a p-th delay-compensating factor for the p-th subpixel is greater than a q-th delay-compensating factor for the q-th subpixel.
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公开(公告)号：US20240057418A1
公开(公告)日：2024-02-15
申请号：US18492194
申请日：2023-10-23
Inventor： Zhongyuan WU , Yongqian LI , Can YUAN , Zhidong YUAN , Meng LI , Dacheng ZHANG , Lang LIU
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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公开(公告)号：US11869411B2
公开(公告)日：2024-01-09
申请号：US17044190
申请日：2019-12-20
Inventor： Xuehuan Feng , Yongqian Li , Dacheng Zhang , Lang Liu
CPC classification number: G09G3/2092 , H01L27/1251 , H01L27/1255 , G09G2300/0842 , G09G2310/0267
Abstract: A display substrate includes: a base substrate; a first conductive pattern arranged on the base substrate; a first insulation layer arranged at a side of the first conductive pattern away from the base substrate; a second conductive pattern arranged at a side of the first insulation layer away from the base substrate; a second insulation layer arranged at a side of the second conductive pattern away from the base substrate; and a third conductive pattern arranged at a side of the second insulation layer away from the base substrate. The third conductive pattern and the first conductive pattern together serve as a first electrode plate of the capacitor, and the second conductive pattern serves as a second electrode plate of the capacitor.
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公开(公告)号：US20230413629A1
公开(公告)日：2023-12-21
申请号：US18029675
申请日：2022-03-09
Inventor： Can YUAN , Yongqian LI
IPC: H10K59/131 , H10K59/121 , H10K59/35 , H10K59/12
CPC classification number: H10K59/1315 , H10K59/1213 , H10K59/1216 , H10K59/351 , H10K59/1201 , H10K59/353
Abstract: A display substrate, a manufacturing method therefor, and a display device. The display substrate comprises multiple display units, and each display unit includes a display area and a transparent area; each display area is provided with a first power supply line and a second power supply line along a first direction, the display area is provided with a first scan signal line, a second scan signal line, a second scan connection line, and a first scan connection line along a second direction, and the second scan connection line and the second scan signal line are connected into a first annular structure; each display area is further provided with a third scan connection line, and the third scan connection line, the first scan connection line, and the first scan signal line are connected into a second annular structure.
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Patent Agency Ranking
公开(公告)号：US11849617B2
公开(公告)日：2023-12-19
申请号：US16976796
申请日：2019-11-29
Inventor： Zhongyuan Wu , Yongqian Li , Can Yuan , Zhidong Yuan , Meng Li , Dacheng Zhang , Lang Liu
IPC: H10K59/131
CPC classification number: H10K59/1315
Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
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127.发明授权公开(公告)号：US11848064B2
公开(公告)日：2023-12-19
申请号：US17791748
申请日：2020-12-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G11C19/28 , G09G3/20
CPC classification number: G11C19/28 , G09G3/20 , G09G3/3266 , G09G2310/0267 , G09G2310/0286
Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: in response to a first voltage signal received at a first voltage signal terminal, transmit the first voltage signal to a leakage prevention input node; and in response to a second voltage signal received at a second voltage signal terminal, transmit the second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are mutually inverted signals. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.
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公开(公告)号：US20230343286A1
公开(公告)日：2023-10-26
申请号：US17913885
申请日：2021-10-28
Inventor： Jianwei YU , Yongqian LI , Can YUAN
IPC: G09G3/3233 , G09G3/3291 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3291 , G09G3/3266 , G09G2300/0426 , G09G2300/0465 , G09G2320/0626 , G09G2300/0452
Abstract: Provided are a pixel structure, a method for driving the same and a display substrate. The pixel structure includes N pixel circuits and a power writing control circuit, N≥2 and N is an integer. Each pixel circuit includes a pixel driving sub-circuit and a light-emitting device. The power writing control circuit provides, according to a voltage regulation control signal, a first power voltage for each pixel circuit in a light-emitting phase. The pixel driving sub-circuit provides, according to a data voltage signal, a driving current for the light-emitting device under the control of a first scanning signal. Light-emitting devices in the pixel circuits are sequentially connected in series, a first electrode of the light-emitting device in the first pixel circuit is connected to the power writing control circuit, a second electrode of the light-emitting device in the Nth pixel circuit is connected to a second power terminal.
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129.发明公开公开(公告)号：US20230335207A1
公开(公告)日：2023-10-19
申请号：US17791597
申请日：2020-12-26
Inventor： Xuehuan FENG , Yongqian LI
IPC: G11C19/28
CPC classification number: G11C19/287
Abstract: A shift register includes a first scan unit including a first input circuit and a first output circuit, and a second scan unit including a second input circuit, a second output circuit, and a potential boost circuit. The first input circuit is configured to transmit an input signal to a first pull-up node. The first output circuit is configured to, under a control of a voltage of the first pull-up node, output a shift signal and a first scan signal. The second input circuit is configured to transmit the input signal to a second pull-up node. The second output circuit is configured to output a second scan signal under a control of a voltage of the second pull-up node. The potential boost circuit is configured to boost the voltage of the second pull-up node in cooperation with the second output circuit.
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公开(公告)号：US20230326412A1
公开(公告)日：2023-10-12
申请号：US18203639
申请日：2023-05-30
Inventor： Xuehuan Feng , Sixiang Wu
IPC: G09G3/3266 , G11C19/28
CPC classification number: G09G3/3266 , G11C19/28 , G09G2310/0286 , G09G2310/061
Abstract: A shift register unit, a driving method thereof, and a gate driving circuit are disclosed. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.
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