-
公开(公告)号：US10389973B2
公开(公告)日：2019-08-20
申请号：US16112454
申请日：2018-08-24
Inventor： Jae-Young Lee , Sung-Ik Park , Sun-Hyoung Kwon , Heung-Mook Kim
IPC: H04L1/00 , H04N3/28 , H04H20/42 , H04L27/26 , H04N5/445 , H04N7/081 , H04N19/187 , H04N21/236 , H04N21/2343 , H04N21/2383
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, size information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.
-
132.发明授权公开(公告)号：US10326552B2
公开(公告)日：2019-06-18
申请号：US15478057
申请日：2017-04-03
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Bo-Mi Lim , Heung-Mook Kim , Nam-Ho Hur
Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to perform power-normalizing for reducing the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time interleaving after performing the power-normalizing; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).
-
公开(公告)号：US10298269B2
公开(公告)日：2019-05-21
申请号：US14671523
申请日：2015-03-27
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
-
134.发明授权公开(公告)号：US10194282B2
公开(公告)日：2019-01-29
申请号：US15311825
申请日：2015-07-02
Inventor： Sun-Hyoung Kwon , Sung-Ik Park , Jae-Young Lee
Abstract: A signal multiplexing apparatus and method using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame using the time-interleaved signal and L1 signaling information.
-
公开(公告)号：US10187701B2
公开(公告)日：2019-01-22
申请号：US15556973
申请日：2016-03-14
Inventor： Sung-Ik Park , Jae-Young Lee , Sun-Hyoung Kwon , Heung-Mook Kim
IPC: H04L1/00 , H04N21/61 , H04H20/42 , H04L5/00 , H04L27/36 , H04N21/2383 , H04L27/38 , H04W28/06 , H04L27/18
Abstract: An apparatus and method for broadcast signal frame using a bootstrap including a symbol for signaling a BICM mode and OFDM parameters of a preamble, together are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal. In this case, the bootstrap includes a symbol for signaling a BICM mode and OFDM parameters of L1-Basic of the preamble, together.
-
Patent Agency Ranking
公开(公告)号：US10187237B2
公开(公告)日：2019-01-22
申请号：US15554495
申请日：2016-02-11
Inventor： Jae-Young Lee , Sung-Ik Park , Sun-Hyoung Kwon , Heung-Mook Kim
Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, type information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.
-
公开(公告)号：US10177790B2
公开(公告)日：2019-01-08
申请号：US15423539
申请日：2017-02-02
Inventor： Sung-Ik Park , Sun-Hyoung Kwon , Jae-Young Lee , Heung-Mook Kim , Nam-Ho Hur
Abstract: A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
-
138.发明授权公开(公告)号：US10164740B2
公开(公告)日：2018-12-25
申请号：US15124646
申请日：2015-02-25
Inventor： Sung-Ik Park , Jae-Young Lee , Sun-Hyoung Kwon , Heung-Mook Kim , Nam-Ho Hur
Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels to generate a multiplexed signal, a power normalizer configured to reduce power of the multiplexed signal to power corresponding to the core layer signal, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.
-
公开(公告)号：US09800266B2
公开(公告)日：2017-10-24
申请号：US14496654
申请日：2014-09-25
Inventor： Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
CPC classification number: H03M13/1102 , H03M13/116 , H03M13/1177 , H03M13/1185 , H03M13/255 , H03M13/616
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 4/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
-
公开(公告)号：US09735807B2
公开(公告)日：2017-08-15
申请号：US15271169
申请日：2016-09-20
Inventor： Sung-Ik Park , Heung-Mook Kim , Sun-Hyoung Kwon , Nam-Ho Hur
CPC classification number: H03M13/1177 , H03M13/1102 , H03M13/1105 , H03M13/116 , H03M13/1165 , H03M13/1185 , H03M13/255 , H03M13/616 , H03M13/6552 , H04L1/0057
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
-
-
-
-
-
-
-
-
-
Search Results
270
records
(took 0.023 seconds)
