公开(公告)号：US20240322842A1

公开(公告)日：2024-09-26

申请号：US18735554

申请日：2024-06-06

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Jae-Young LEE ,  Heung-Mook KIM

IPC: H03M13/15 ,  H03M13/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29

CPC classification number: H03M13/152 ,  H03M13/116 ,  H03M13/1162 ,  H03M13/1165 ,  H03M13/271 ,  H03M13/2778 ,  H03M13/618 ,  H03M13/6362 ,  H03M13/253 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/6393 ,  H03M13/6552

Abstract: A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.

公开(公告)号：US20240088917A1

公开(公告)日：2024-03-14

申请号：US18140164

申请日：2023-04-27

Applicant: Panasonic Holdings Corporation

Inventor： Mihail PETROV

IPC: H03M13/27 ,  H03M13/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/29 ,  H03M13/35 ,  H04L1/00

CPC classification number: H03M13/2792 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/1168 ,  H03M13/255 ,  H03M13/27 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/2778 ,  H03M13/2957 ,  H03M13/356 ,  H03M13/6325 ,  H03M13/6552 ,  H03M13/6555 ,  H04L1/0058 ,  H04L1/0606

Abstract: A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×M′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×M′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

公开(公告)号：US11916665B2

公开(公告)日：2024-02-27

申请号：US17743783

申请日：2022-05-13

Applicant: Panasonic Holdings Corporation

Inventor： Peter Klenner ,  Frank Herrmann ,  Tomohiro Kimura

IPC: H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H04L27/34

CPC classification number: H04L1/0041 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/2778 ,  H04L1/0058 ,  H04L1/0071 ,  H04L27/3405

Abstract: A communication method includes executing a cyclic block permutation for a codeword generated based on a quasi-cyclic parity-check code including a repeat-accumulate quasi-cyclic low-density parity-check code, where the cyclic block permutation is permutation of cyclic blocks within the codeword, and mapping each bit of the codeword for which the cyclic block permutation is executed to any one of constellation point of a non-uniform constellation.

公开(公告)号：US11838124B2

公开(公告)日：2023-12-05

申请号：US17827883

申请日：2022-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Se-Ho Myung ,  Kyung-Joong Kim ,  Hong-Sil Jeong

IPC: H03M13/00 ,  H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/29 ,  H03M13/37 ,  H03M13/15

CPC classification number: H04L1/0057 ,  H03M13/1105 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/3776 ,  H03M13/616 ,  H03M13/6393 ,  H04L1/007 ,  H04L1/0045 ,  H04L1/0071 ,  H03M13/152 ,  H04L1/0065

Abstract: A receiver is provided. The receiver includes: a first decoder configured to decode a superposition-coded signal by using a parity check matrix to generate Low Density Parity Check (LDPC) information word bits and first parity bits corresponding to a first layer signal; an encoder configured to encode the LDPC information word bits and the first parity bits to generate second parity bits, or encode the LDPC information word bits to generate the first parity bits and the second parity bits, by using the parity check matrix; and a second decoder configured to decode a signal which is generated by removing the first layer signal, corresponding to the LDPC information word bits, the first parity bits, and the second parity bits, from the superposition-coded signal, to reconstruct bits transmitted through the second layer signal.

公开(公告)号：US20230344449A1

公开(公告)日：2023-10-26

申请号：US18338081

申请日：2023-06-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Jae-Young LEE ,  Heung-Mook KIM

IPC: H03M13/11 ,  H03M13/29 ,  H03M13/25 ,  H03M13/27 ,  H03M13/00

CPC classification number: H03M13/1148 ,  H03M13/1105 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/27 ,  H03M13/2778 ,  H03M13/2906 ,  H03M13/618 ,  H03M13/6362 ,  G06T7/162

Abstract: A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.

公开(公告)号：US11757568B2

公开(公告)日：2023-09-12

申请号：US17882217

申请日：2022-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Se-ho Myung ,  Hong-sil Jeong ,  Kyung-joong Kim

IPC: H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  G06F11/10 ,  G06F17/11 ,  H03M13/15

CPC classification number: H04L1/0041 ,  G06F11/1096 ,  G06F17/11 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/271 ,  H03M13/2732 ,  H03M13/2778 ,  H03M13/2906 ,  H04L1/0045 ,  H04L1/0057 ,  H04L1/0071 ,  H03M13/152

Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.

公开(公告)号：US11700018B2

公开(公告)日：2023-07-11

申请号：US17723765

申请日：2022-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hong-sil Jeong ,  Kyung-Joong Kim ,  Se-ho Myung

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/27 ,  H04L1/00 ,  H03M13/25 ,  H04L27/36

CPC classification number: H03M13/1111 ,  H03M13/1102 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/271 ,  H03M13/2707 ,  H03M13/2778 ,  H03M13/2792 ,  H03M13/611 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0058 ,  H04L1/0071 ,  H04L27/36

Abstract: A signal receiving method include: demodulating a signal received from a transmitting apparatus to generate values based on 1024-quadrature amplitude modulation (QAM); splitting the values into a plurality of groups; deinterleaving the plurality of groups based on a preset interleaving order; and decoding values of the deinterleaved plurality of groups based on a low density parity check (LDPC) code, a code rate of the LDPC code being 6/15 and a code length of the LDPC code being 64800, wherein the plurality of groups are deinterleaved based on a predetermined equation.

公开(公告)号：US20230163878A1

公开(公告)日：2023-05-25

申请号：US18094708

申请日：2023-01-09

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Hong-sil JEONG ,  Se-ho MYUNG ,  Kyung-joong KIM

IPC: H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/35 ,  H03M13/00 ,  H04L27/04

CPC classification number: H04L1/0071 ,  H03M13/11 ,  H03M13/1102 ,  H03M13/1165 ,  H03M13/1177 ,  H03M13/255 ,  H03M13/27 ,  H03M13/271 ,  H03M13/2778 ,  H03M13/2792 ,  H03M13/356 ,  H03M13/616 ,  H04L1/00 ,  H04L1/004 ,  H04L1/0041 ,  H04L1/0057 ,  H04L27/04 ,  H03M13/6538 ,  H03M13/6552 ,  H03M13/6555 ,  H04L27/36

Abstract: A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.

公开(公告)号：US11658683B2

公开(公告)日：2023-05-23

申请号：US17661981

申请日：2022-05-04

Applicant: Saturn Licensing LLC

Inventor： Ryoji Ikegaya ,  Makiko Yamamoto ,  Yuji Shinohara

IPC: H03M13/11 ,  H03M13/03 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H03M13/35 ,  H04L1/00 ,  G06F11/10 ,  H03M13/00 ,  H03M13/15

CPC classification number: H03M13/1148 ,  G06F11/10 ,  H03M13/036 ,  H03M13/1137 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/271 ,  H03M13/2757 ,  H03M13/2778 ,  H03M13/2792 ,  H03M13/2906 ,  H03M13/356 ,  H03M13/616 ,  H04L1/00 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0058 ,  H04L1/0071 ,  H03M13/152

Abstract: The present technology relates to a data processing device and a data processing method, which are capable of securing excellent communication quality in data transmission using an LDPC code. In group-wise interleave, an LDPC code in which a code length N is 16200 bits and an encoding rate r is 6/15, 8/15, or 10/15 is interleaved in units of bit groups of 360 bits. In group-wise deinterleave, a sequence of the LDPC code that has undergone the group-wise interleave is restored to an original sequence. For example, the present technology can be applied to a technique of performing data transmission using an LDPC code.

公开(公告)号：US20230155723A1

公开(公告)日：2023-05-18

申请号：US18155645

申请日：2023-01-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hong-sil Jeong ,  Kyung-Joong Kim ,  Se-ho Myung

IPC: H04L1/00 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27 ,  H03M13/37 ,  H03M13/00

CPC classification number: H04L1/0041 ,  H03M13/1165 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/2778 ,  H03M13/3761 ,  H03M13/3769 ,  H03M13/6356 ,  H03M13/6362 ,  H04L1/0045 ,  H04L1/0057 ,  H04L1/0065 ,  H04L1/0067 ,  H04L1/0071 ,  H03M13/152

Abstract: A transmitter is provided. The transmitter includes: a Low Density Parity Check (LDPC) encoder configured to encode input bits to generate an LDPC codeword including the input bits and parity bits to be transmitted in a current frame; a parity permutator configured to perform by group-wise interleaving a plurality of bit groups configuring the parity bits based on a group-wise interleaving pattern comprising a first pattern and a second pattern; a puncturer configured to puncture some of the parity-permutated parity bits; and an additional parity generator configured to select at least some of the punctured parity bits to generate additional parity bits to be transmitted in a previous frame of the current frame, based on the first pattern and the second pattern.