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公开(公告)号：US11416735B2
公开(公告)日：2022-08-16
申请号：US16839447
申请日：2020-04-03
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz
Abstract: Examples described herein utilize multi-layer neural networks to decode encoded data (e.g., data encoded using one or more encoding techniques). The multi-layer neural networks include an encoder configured to encode input data using encoded bits in accordance with an encoding technique and to provide encoded input data, and a memory configured to receive the encoded input data from the encoder and configured to store the encoded input data. The multi-layer neural networks further include combiners configured to receive the encoded input data from the memory and further configured to combine the encoded input data among a set of predetermined weights. The combiners are further configured to provide encoded data with reduced noise, the noise introduced by the memory.
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公开(公告)号：US11355175B2
公开(公告)日：2022-06-07
申请号：US16844997
申请日：2020-04-09
Applicant: Micron Technology, Inc.
Inventor： Poorna Kale , Jaime Cummins
Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured to execute instructions with matrix operands and configured with: random access memory configured to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; a connection between the random access memory and the Deep Learning Accelerator; a first interface to a memory controller of a Central Processing Unit; and a second interface to an image generator, such as a camera. While the Deep Learning Accelerator is using the random access memory to process current input to the Artificial Neural Network in generating current output from the Artificial Neural Network, the Deep Learning Accelerator may concurrently load next input from the camera into the random access memory; and at the same time, the Central Processing Unit may concurrently retrieve prior output from the random access memory.
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公开(公告)号：US20220147809A1
公开(公告)日：2022-05-12
申请号：US17092023
申请日：2020-11-06
Applicant: Micron Technology, Inc.
Inventor： Aliasger Tayeb Zaidy , Marko Vitez , Eugenio Culurciello , Jaime Cummins , Andre Xian Ming Chang
Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, an integrated circuit device may be configured to execute instructions with matrix operands and configured with random access memory. A compiler can convert a description of an artificial neural network into a compiler output through optimization and/or selection of hardware options of the integrated circuit device. The compiler output can include parameters of the artificial neural network, instructions executable by processing units of the Deep Learning Accelerator to generate an output of the artificial neural network responsive to an input to the artificial neural network, and hardware options to be stored in registers connected to control hardware configurations of the processing units.
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公开(公告)号：US20210319305A1
公开(公告)日：2021-10-14
申请号：US16845002
申请日：2020-04-09
Applicant: Micron Technology, Inc.
Inventor： Poorna Kale , Jaime Cummins
Abstract: Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. An integrated circuit may be configured with: a Central Processing Unit, a Deep Learning Accelerator configured to execute instructions with matrix operands; random access memory configured to store first instructions of an Artificial Neural Network executable by the Deep Learning Accelerator and second instructions of an application executable by the Central Processing Unit; one or connections among the random access memory, the Deep Learning Accelerator and the Central Processing Unit; and an input/output interface to an external peripheral bus. While the Deep Learning Accelerator is executing the first instructions to convert sensor data according to the Artificial Neural Network to inference results, the Central Processing Unit may execute the application that uses inference results from the Artificial Neural Network.
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135.发明授权公开(公告)号：US11115256B2
公开(公告)日：2021-09-07
申请号：US16594550
申请日：2019-10-07
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Chritz , Tamara Schmitz , Fa-Long Luo , Jaime Cummins
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to the wireless protocol in the RF wireless domain. A computing device may be trained to generate coefficient data based on the operations of a wireless transceiver such that mixing input data using the coefficient data generates an approximation of the output data, as if it were processed by the wireless transceiver. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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Patent Agency Ranking
136.发明授权公开(公告)号：US11088888B2
公开(公告)日：2021-08-10
申请号：US16594503
申请日：2019-10-07
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Jeremy Chritz , Tamara Schmitz
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The processing mode selection may include a single processing mode, a multi-processing mode, or a full processing mode. The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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公开(公告)号：US11088716B2
公开(公告)日：2021-08-10
申请号：US15890275
申请日：2018-02-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator that compensates for the self-interference noise generated by power amplifiers at harmonic frequencies of a respective wireless receiver. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate the adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is receivable by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same or different frequency band as the wireless receiver is receiving.
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138.发明授权公开(公告)号：US10999835B2
公开(公告)日：2021-05-04
申请号：US16048075
申请日：2018-07-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of configuration modes for baseband units (BBU) and remote radio heads (RRH). For example, a computing system including a BBU and a RRH may receive a configuration mode selection including information indicative of a configuration mode for respective processing units of the BBU and the RRH. The computing system allocates the respective processing units to perform wireless processing stages associated with a wireless protocol. The BBU and/or the RRH may generate an output data stream based on the mixing of coefficient data with input data at the BBU and/or the RRH. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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公开(公告)号：US10938426B2
公开(公告)日：2021-03-02
申请号：US16432766
申请日：2019-06-05
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jeremy Chritz , Jaime Cummins , Tamara Schmitz
Abstract: Examples described herein include methods, devices, and systems which may compensate input data for non-linear power amplifier noise to generate compensated input data. In compensating the noise, during an uplink transmission time interval (TTI), a switch path is activated to provide amplified input data to a receiver stage including a coefficient calculator. The coefficient calculator may calculate an error representative of the noise based partly on the input signal to be transmitted and a feedback signal to generate coefficient data associated with the power amplifier noise. The feedback signal is provided, after processing through the receiver, to a coefficient calculator. During an uplink TTI, the amplified input data may also be transmitted as the RF wireless transmission via an RF antenna. During a downlink TTI, the switch path may be deactivated and the receiver stage may receive an additional RF wireless transmission to be processed in the receiver stage.
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公开(公告)号：US20190245565A1
公开(公告)日：2019-08-08
申请号：US15890275
申请日：2018-02-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
CPC classification number: H04B1/0475 , H04L5/14
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a self-interference noise calculator that compensates for the self-interference noise generated by power amplifiers at harmonic frequencies of a respective wireless receiver. The self-interference noise calculator may be coupled to antennas of a wireless device and configured to generate the adjusted signals that compensate self-interference. The self-interference noise calculator may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the self-interference noise calculator to generate a corresponding adjusted signal. The adjusted signal is receivable by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same or different frequency band as the wireless receiver is receiving.
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