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    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS
    131.
    发明申请
    MEMORY DEVICES AND METHODS WHICH MAY FACILITATE TENSOR MEMORY ACCESS 审中-公开

    公开(公告)号：US20200034306A1

    公开(公告)日：2020-01-30

    申请号：US16043921

    申请日：2018-07-24

    Applicant: Micron Technology, Inc.

    Inventor： Fa-Long Luo ,  Jaime Cummins ,  Tamara Schmitz ,  Jeremy Chritz

    IPC: G06F12/0893 ,  G06F12/02 ,  G06F12/0864

    Abstract: Methods, apparatuses, and systems for tensor memory access are described. Multiple data located in different physical addresses of memory may be concurrently read or written by, for example, employing various processing patterns of tensor or matrix related computations. A memory controller, which may comprise a data address generator, may be configured to generate a sequence of memory addresses for a memory access operation based on a starting address and a dimension of a tensor or matrix. At least one dimension of a tensor or matrix may correspond to a row, a column, a diagonal, a determinant, or an Nth dimension of the tensor or matrix. The memory controller may also comprise a buffer configured to read and write the data generated from or according to a sequence of memory of addresses.

    System for optimizing routing of communication between devices and resource reallocation in a network
    132.
    发明授权
    System for optimizing routing of communication between devices and resource reallocation in a network 有权

    公开(公告)号：US10511353B2

    公开(公告)日：2019-12-17

    申请号：US15726281

    申请日：2017-10-05

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jeremy Chritz

    IPC: H04B7/04 ,  H04W28/18 ,  H04W28/02 ,  H04W72/04 ,  H04W28/08 ,  H04B7/0413 ,  H04W16/28 ,  H04L12/851

    Abstract: Methods, systems, and devices for signal processing and wireless communication are described. For example, a device may include a plurality of antennas operable to transmit and receive communication packets via a plurality of communication protocols and an integrated circuit chip coupled to the plurality of antennas. The integrated circuit chip may comprise a first and a second plurality of processing elements. The first plurality of processing elements may be operable to receive communication packets via a first one of a plurality of communication protocols and process an optimal route. The second plurality of processing elements may be communicatively coupled to the first plurality of processing elements and operable to determine the optimal route to transmit the communication packets from a source device to a destination device based, at least in part, on transmission characteristics associated with at least one of the source or destination devices.

    Wireless devices and systems including examples of mixing input data with coefficient data
    133.
    发明授权
    Wireless devices and systems including examples of mixing input data with coefficient data 有权

    公开(公告)号：US10439855B2

    公开(公告)日：2019-10-08

    申请号：US16034751

    申请日：2018-07-13

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jeremy Chritz ,  Tamara Schmitz ,  Fa-Long Luo ,  Jaime Cummins

    IPC: H04L27/04 ,  H04L27/12 ,  H04L27/20 ,  H04L27/26 ,  G06F19/00 ,  H04B1/00

    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to the wireless protocol in the RF wireless domain. A computing device may be trained to generate coefficient data based on the operations of a wireless transceiver such that mixing input data using the coefficient data generates an approximation of the output data, as if it were processed by the wireless transceiver. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.

    Autocorrelation and memory allocation for wireless communication
    134.
    发明授权
    Autocorrelation and memory allocation for wireless communication 有权

    公开(公告)号：US10305555B2

    公开(公告)日：2019-05-28

    申请号：US15789600

    申请日：2017-10-20

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Fa-Long Luo ,  Tamara Schmitz ,  Jeremy Chritz ,  Jaime Cummins

    IPC: H04B7/08 ,  G06F17/15 ,  H04W84/00 ,  H04B7/0456

    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of an autocorrelation calculator. An electronic device including an autocorrelation calculator may be configured to calculate an autocorrelation matrix including an autocorrelation of symbols indicative of a first radio frequency (“RF”) signal and a second RF signal. The electronic device may calculate the autocorrelation matrix based on a stored autocorrelation matrix and the autocorrelation of symbols indicative of the first RF signal and symbols indicative of the second RF signal. The stored autocorrelation matrix may represent another received signal at a different time period than a time period of the first and second RF signals. Examples of the systems and methods may facilitate the processing of data for wireless and may utilize less memory space than a device than a scheme that stores and calculates autocorrelation from a large dataset computed from various timepoints.

    FORWARDED OPERAND AND MACHINE LEARNING UTILIZING THE SAME
    135.
    发明申请
    FORWARDED OPERAND AND MACHINE LEARNING UTILIZING THE SAME 审中-公开

    公开(公告)号：US20190108018A1

    公开(公告)日：2019-04-11

    申请号：US15726293

    申请日：2017-10-05

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Gregory Edvenson ,  David Hulton ,  Jeremy Chritz

    IPC: G06F9/30 ,  G06F15/18

    Abstract: Apparatuses and methods are disclosed for an FPGA architecture that may improve processing speed and efficiency in processing less complex operands. Some applications may utilize operands that are less complex, such as operands that are 1, 2, or 4 bits, for example. In some examples, the DSP architecture may skip or avoid processing all received operands or may process a common operand more frequently than other operands. An example apparatus may include configurable logic blocks including DSP slices and an interconnected coupling the configurable logic blocks. An operand register of a DSP slice may include an operand input that is coupled to an output of that DSP slice.

    SYSTEM FOR OPTIMIZING ROUTING OF COMMUNICATION BETWEEN DEVICES AND RESOURCE REALLOCATION IN A NETWORK
    136.
    发明申请
    SYSTEM FOR OPTIMIZING ROUTING OF COMMUNICATION BETWEEN DEVICES AND RESOURCE REALLOCATION IN A NETWORK 审中-公开

    公开(公告)号：US20190020383A1

    公开(公告)日：2019-01-17

    申请号：US16107796

    申请日：2018-08-21

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jeremy Chritz

    IPC: H04B7/04 ,  H04W28/08 ,  H04W72/04

    Abstract: Methods, systems, and devices for signal processing and wireless communication are described. For example, a device may include a plurality of antennas operable to transmit and receive communication packets via a plurality of communication protocols and an integrated circuit chip coupled to the plurality of antennas. The integrated circuit chip may comprise a first and a second plurality of processing elements. The first plurality of processing elements may be operable to receive communication packets via a first one of a plurality of communication protocols and process an optimal route. The second plurality of processing elements may be communicatively coupled to the first plurality of processing elements and operable to determine the optimal route to transmit the communication packets from a source device to a destination device based, at least in part, on transmission characteristics associated with at least one of the source or destination devices.

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