公开(公告)号：US11363299B2

公开(公告)日：2022-06-14

申请号：US17116137

申请日：2020-12-09

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Che Wei Kuo ,  Chong Soon Lim ,  Chu Tong Wang ,  Han Boon Teo ,  Hai Wei Sun ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/66 ,  H04N19/122 ,  H04N19/176 ,  H04N19/103 ,  H04N19/96

Abstract: An encoder includes circuitry and memory connected to the circuitry, and the circuitry, in operation: determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The circuitry determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.

公开(公告)号：US11240530B2

公开(公告)日：2022-02-01

申请号：US17081267

申请日：2020-10-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takashi Hashimoto ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi ,  Ryuichi Kanoh

IPC: H04N19/52 ,  H04N19/159 ,  H04N19/182

Abstract: An encoder includes: circuitry; and memory, in which using the memory, the circuitry, in affine motion compensation prediction in inter prediction for a current block, places a limit on a range within which motion estimation or motion compensation is performed, and performs the motion compensation for the current block.

公开(公告)号：US11206402B2

公开(公告)日：2021-12-21

申请号：US17125113

申请日：2020-12-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/13 ,  H04N19/70 ,  H04N19/176 ,  H04L29/06 ,  H04N19/184

Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.

公开(公告)号：US11166032B2

公开(公告)日：2021-11-02

申请号：US17080141

申请日：2020-10-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Alec Hodgkinson ,  Luca Rigazio ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh ,  Tadamasa Toma

IPC: H04N19/184 ,  H04N19/46 ,  H04N19/85 ,  H04N19/136 ,  H04N19/124 ,  G06N3/08

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry: encodes an original image and decodes the original image encoded, to generate a first bitstream and a local decoded image; encodes supplemental information and decodes the encoded supplemental information, to generate a second bitstream and local decoded supplemental information; inputs data based on the local decoded image and the local decoded supplemental information to a post processing network which is a neural network, to cause a reconstructed image to be output from the post processing network, the reconstructed image corresponding to the original image and being to be used to encode a following original image which follows the original image; and concatenates the first bitstream and the second bitstream to generate a concatenated bitstream.

公开(公告)号：US11153596B2

公开(公告)日：2021-10-19

申请号：US16696249

申请日：2019-11-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Takashi Hashimoto

IPC: H04N19/52 ,  H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186

Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.

公开(公告)号：US11134260B2

公开(公告)日：2021-09-28

申请号：US16860367

申请日：2020-04-28

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takashi Hashimoto ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi ,  Ryuichi Kanoh

IPC: H04N19/51 ,  H04N19/433

Abstract: An encoder that encodes a picture to generate a coded stream includes: circuitry and a memory coupled to the circuitry. The circuitry performs, using the memory: generating a prediction image of a current block included in a current picture by referring to a first region included in a reference picture different from the current picture; operating a bi-directional optical flow process to correct the prediction image by referring to a second region included in the first region, and not operating the bi-directional optical flow process in response to the second region not being included in the first region; and encoding the current block based on the prediction image.

公开(公告)号：US11128883B2

公开(公告)日：2021-09-21

申请号：US16799315

申请日：2020-02-24

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/52 ,  H04N19/157 ,  H04N19/176 ,  H04N19/182 ,  H04N19/59

Abstract: Provided is an encoder includes: circuitry; and memory, in which the circuitry: determines which mode is used to perform a prediction process, among modes including a first mode in which the prediction process is performed based on a motion vector of each block in a video and a second mode in which the prediction process is performed based on a motion vector of each sub-block obtained by splitting the block; when the prediction process is performed in the first mode, determines whether to perform a correction process on a prediction image using a spatial gradient of pixel values in the prediction image obtained by performing the prediction process, and performs the correction process when it is determined to perform the correction process; and when the prediction process is performed in the second mode, does not perform the correction process.

公开(公告)号：US11102512B2

公开(公告)日：2021-08-24

申请号：US17023968

申请日：2020-09-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh

IPC: H04N19/96 ,  H04N19/593 ,  H04N19/44 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: prohibits a first splitting method when arrangement and shapes of blocks obtained by splitting a first block multiple times by the first splitting method are identical to arrangement and shapes of blocks obtained by splitting the first block multiple times by a second splitting method different from the first splitting method, and when scan order of the blocks obtained by the first splitting method is identical to scan order of the blocks obtained by the second splitting method; and encodes the first block.

公开(公告)号：US11039164B2

公开(公告)日：2021-06-15

申请号：US16799354

申请日：2020-02-24

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/00 ,  H04N19/52 ,  H04N19/12 ,  H04N19/174 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.

公开(公告)号：US11006110B2

公开(公告)日：2021-05-11

申请号：US16809216

申请日：2020-03-04

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe

IPC: H04N19/117 ,  H04N19/146 ,  H04N19/176

Abstract: An encoder determines a filter to be used for deblocking filtering from among a plurality of filters including a first filter and a second filter. The first filter uses M pixels located at an upper side of the block boundary and M pixels located at a lower side of the block boundary, and the second filter uses first pixels located at the upper side of the block boundary and second pixels located at the lower side of the block boundary, where M is an integer of at least 2. The number of the first pixels is any one of a plurality of first candidate values, and the number of the second pixels is any one of a plurality of second candidate values. The plurality of first pixel candidate values and the plurality of second pixel candidate values are each a value greater than or equal to M.