公开(公告)号：US20210144040A1

公开(公告)日：2021-05-13

申请号：US17153038

申请日：2021-01-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Jae-Young LEE ,  Sun-Hyoung KWON ,  Sung-Ik PARK ,  Bo-Mi LIM ,  Heung-Mook KIM

IPC: H04L27/26 ,  H03M13/11 ,  H04L1/00 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H03M13/35

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the time interleaver uses one of time interleaver groups, and the time interleaver performs the interleaving by using one of a plurality of operation modes.

公开(公告)号：US20210119729A1

公开(公告)日：2021-04-22

申请号：US17132186

申请日：2020-12-23

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sun-Hyoung KWON ,  Sung-Ik PARK ,  Jae-Young LEE ,  Bo-Mi LIM ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H04L1/00 ,  H04J99/00

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the preamble includes a field indicating a start position of a first complete FEC block corresponding to each of physical layer pipes.

公开(公告)号：US20210019228A1

公开(公告)日：2021-01-21

申请号：US17060768

申请日：2020-10-01

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Bo-Mi LIM ,  Jae-Young LEE ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: G06F11/10 ,  H03M13/11 ,  H03M13/25 ,  H03M13/27

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 10/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

公开(公告)号：US20200288469A1

公开(公告)日：2020-09-10

申请号：US16880545

申请日：2020-05-21

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jae-Young LEE ,  Sung-Ik PARK ,  Sun-Hyoung KWON ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H04W72/04 ,  H04L27/26 ,  H04J11/00 ,  H04L1/00 ,  H04L27/34 ,  H04W52/34 ,  H04L5/22 ,  H04L29/06 ,  H04W52/04

Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.

公开(公告)号：US20200235976A1

公开(公告)日：2020-07-23

申请号：US16652428

申请日：2018-05-24

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  KOREA MARITIME UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION

Inventor： Sung-Ik PARK ,  Jeong-Chang KIM ,  Jae-Young LEE ,  Sun-Hyoung KWON ,  Hyeong-Seok KIM ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H04L27/26 ,  H04L1/00 ,  H04L25/02

Abstract: Disclosed herein are an apparatus and method for decoding a bootstrap signal. The apparatus for decoding a bootstrap signal according to an embodiment of the present invention includes an operation unit for calculating the relative cyclic shift and the channel gain estimate of a received bootstrap signal and correcting the channel gain estimate using the relative cyclic shift, and a decoding unit for decoding the bootstrap signal using the corrected channel gain estimate.

公开(公告)号：US20200212938A1

公开(公告)日：2020-07-02

申请号：US16808288

申请日：2020-03-03

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Jae-Young LEE ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H03M13/27 ,  H03M13/11

Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.

公开(公告)号：US20200153519A1

公开(公告)日：2020-05-14

申请号：US16744421

申请日：2020-01-16

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Jae-Young LEE ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H04H20/67 ,  H04L27/26 ,  H04L1/00 ,  H04L29/08 ,  H04H20/71 ,  H04W52/32 ,  H04H60/73 ,  H04J11/00 ,  H04H60/44 ,  H04H20/31

Abstract: An apparatus for transmitting broadcasting signal using transmitter identification scaled by 4-bit injection level code and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter, the transmitter identification signal scaled by an injection level code; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.

公开(公告)号：US20200052724A1

公开(公告)日：2020-02-13

申请号：US16658270

申请日：2019-10-21

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Jae-Young LEE ,  Heung-Mook KIM

IPC: H03M13/27 ,  H03M13/11 ,  H04L1/00 ,  H03M13/25 ,  H03M13/29 ,  H03M13/15

Abstract: A parity interleaving apparatus and method for fixed length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.

公开(公告)号：US20190393891A1

公开(公告)日：2019-12-26

申请号：US16559329

申请日：2019-09-03

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Ik PARK ,  Heung-Mook KIM ,  Sun-Hyoung KWON ,  Nam-Ho HUR

IPC: H03M13/11 ,  H04L1/00 ,  H03M13/03 ,  H03M13/00

Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).

公开(公告)号：US20190356340A1

公开(公告)日：2019-11-21

申请号：US16530758

申请日：2019-08-02

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Ik PARK ,  Sun-Hyoung KWON ,  Bo-Mi LIM ,  Jae-Young LEE ,  Heung-Mook KIM ,  Nam-Ho HUR

IPC: H03M13/27 ,  G06F11/10 ,  H03M13/11 ,  H04L1/00 ,  H03M13/00 ,  H03M13/25

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.