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    SEMICONDUCTOR DEVICE
    161.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230223844A1

    公开(公告)日：2023-07-13

    申请号：US18153446

    申请日：2023-01-12

    Applicant: Samsung Electronics Co., Ltd. ,  KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

    Inventor： JUNHYEOK YANG ,  JEONG-HYUN CHO ,  JEONGPYO PARK ,  TAE-HWANG KONG ,  HYUN-SIK KIM ,  HONG-HYUN BAE

    IPC: H02M3/07 ,  H02M3/158

    CPC classification number: H02M3/07 ,  H02M3/158

    Abstract: A semiconductor device may include: a flying capacitor connected between a first node and a second node; a first inductor having a first end connected to the flying capacitor through the first node and a second end connected to an output node; and a second inductor having a first end connected to the flying capacitor through the second node and a second end connected to the output node, wherein the semiconductor device is configurable in a plurality of different states based on a plurality of different operational phases, and wherein the flying capacitor is configured to float in a first phase, is configured to be discharged through the first inductor in a second phase that is different from the first phase, and is configured to be charged through the second inductor in a third phase that is different from the first phase and the second phase.

    METHOD AND SYSTEM FOR SEARCHING DEEP NEURAL NETWORK ARCHITECTURE
    165.
    发明公开
    METHOD AND SYSTEM FOR SEARCHING DEEP NEURAL NETWORK ARCHITECTURE 审中-公开

    公开(公告)号：US20230214646A1

    公开(公告)日：2023-07-06

    申请号：US17856569

    申请日：2022-07-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： CHAN-HYUN YOUN ,  KYUNGCHAE LEE ,  LINH LE VU ,  HEEJAE KIM

    IPC: G06N3/08 ,  G06N3/04 ,  G06N3/063

    CPC classification number: G06N3/08 ,  G06N3/04 ,  G06N3/063

    Abstract: A method for searching deep neural network architecture for computation offloading in a computing environment is provided. The method comprises configuring a target deep network including a plurality of computation cells, each computation cell including a plurality of nodes, a weight between each node of the plurality of nodes, and an operation selector that selects a candidate operation between each node of the plurality of nodes, partitioning the plurality of computation cells into a first portion in which the computation is performed on the first device and a second portion in which the computation is performed on the second device, the first portion including a transmission cell, and the transmission cell including a resource selector that determines whether each computation inside the transmission cell is processed by the first device or the second device, and a channel selector which determines a channel through which a computation result processed by the first device is transmitted to the second device, and updating the weight, the operation selector, the resource selector, and the channel selector.

    FLOATING-POINT COMPUTATION APPARATUS AND METHOD USING COMPUTING-IN-MEMORY
    168.
    发明公开
    FLOATING-POINT COMPUTATION APPARATUS AND METHOD USING COMPUTING-IN-MEMORY 审中-公开

    公开(公告)号：US20230195420A1

    公开(公告)日：2023-06-22

    申请号：US17741509

    申请日：2022-05-11

    Applicant: Korea Advanced Institute of Science and Technology

    Inventor： Hoi Jun YOO ,  Ju Hyoung LEE

    IPC: G06F7/544 ,  G06F7/487 ,  G06F7/485 ,  G06F7/499 ,  G06F5/01 ,  G06N3/04

    CPC classification number: G06F7/5443 ,  G06F7/4876 ,  G06F7/485 ,  G06F7/49915 ,  G06F5/012 ,  G06N3/04

    Abstract: Disclosed herein are a floating-point computation apparatus and method using Computing-in-Memory (CIM). The floating-point computation apparatus performs a multiply-and-accumulation operation on pieces of input neuron data represented in a floating-point format, and includes a data preprocessing unit configured to separate and extract an exponent and a mantissa from each of the pieces of input neuron data, an exponent processing unit configured to perform CIM on input neuron exponents, which are exponents separated and extracted from the input neuron data, and a mantissa processing unit configured to perform a high-speed computation on input neuron mantissas, separated and extracted from the input neuron data, wherein the exponent processing unit determines a mantissa shift size for a mantissa computation and transfers the mantissa shift size to the mantissa processing unit, and the mantissa processing unit normalizes a result of the mantissa computation and transfers a normalization value to the exponent processing unit.

    HYPER ELASTIC SOFT GROWING ROBOT
    170.
    发明公开
    HYPER ELASTIC SOFT GROWING ROBOT 审中-公开

    公开(公告)号：US20230173666A1

    公开(公告)日：2023-06-08

    申请号：US17541729

    申请日：2021-12-03

    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

    Inventor： Jee Hwan RYU ,  Nam Gyun KIM

    IPC: B25J9/14

    CPC classification number: B25J9/142

    Abstract: Provided is a soft growing robot which may be precisely controlled by reducing the effect of a tail tension applied to its inner periphery, the soft growing robot including: a case having one open side; and a vine including an outer periphery having one end fixed to one side surface of the case, the inner periphery disposed inside the outer periphery while being spaced apart from the outer periphery and extended into the case, a tip connecting the other end of the outer periphery and one end of the inner periphery to each other, and a tip space formed by the outer periphery, the tip and the inner periphery, and a tip space formed by the outer periphery, the tip and the inner periphery, wherein a diameter of the tip is smaller than a diameter of the outer periphery, thereby forming a bent portion between the tip and the outer periphery.

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