Abstract:
A semiconductor wafer analysis system is provided. In an embodiment, the semiconductor wafer analysis system includes a tester to test semiconductor wafers manufactured by at least one manufacturing facility, a wafer map generation module to generate wafer maps on the basis of the test results from the tester, and a wafer analysis module. The wafer analysis module may include a data generation module that divides each wafer map into a plurality of defect analysis regions and generates feature vectors representing the semiconductor wafers, and an operation module that statistically analyzes the feature vectors.
Abstract:
Disclosed is a metal capacitor including a lower electrode having hemispherical metal grains thereon. The metal capacitor includes a lower metal electrode containing Ti, hemispherical metal grains containing Pd and formed on the lower metal electrode containing Ti, a dielectric layer formed on the lower metal electrode containing Ti and the hemispherical metal grains containing Pd, and an upper metal electrode formed on the dielectric layer.