公开(公告)号：US20070194974A1

公开(公告)日：2007-08-23

申请号：US11357068

申请日：2006-02-21

Applicant: Chun-Sheng Lin

Inventor： Chun-Sheng Lin

IPC: H03M1/12

CPC classification number: H03K17/6872 ,  G09G3/3611 ,  G09G2330/021 ,  H03K2217/0036

Abstract: The present invention discloses a structure and method for reducing the current consumption of a capacitive load, wherein a storage capacitor is installed between a capacitive load and the output side of a drive element; a switch is used to switch the connection between the storage capacitor and the capacitive load and the connection between the output side and the capacitive load; when the output side is to undertake a signal transition, the switch interconnects the storage capacitor and the capacitive load to equalize those two capacitors; after the equalization is completed, the switch interconnects the output side and the capacitive load to charge the capacitive load; thus, the load capacitor of the capacitive load can be charged or discharged at an initial voltage level.

Abstract translation: 本发明公开了一种用于降低电容性负载的电流消耗的结构和方法，其中存储电容器安装在电容性负载与驱动元件的输出侧之间; 开关用于切换存储电容和容性负载之间的连接以及输出侧和容性负载之间的连接; 当输出端进行信号转换时，开关将存储电容和容性负载相互连接，以平衡这两个电容; 在均衡完成之后，开关将输出侧和容性负载互连，对容性负载进行充电; 因此，容性负载的负载电容器可以在初始电压电平下被充电或放电。

公开(公告)号：US06719885B2

公开(公告)日：2004-04-13

申请号：US10087344

申请日：2002-03-01

Applicant: Chun-Sheng Lin ,  Jui-Hei Huang ,  Chi-Sheng Lo ,  Long-Siang Chuang

Inventor： Chun-Sheng Lin ,  Jui-Hei Huang ,  Chi-Sheng Lo ,  Long-Siang Chuang

IPC: C23C1434

CPC classification number: H01L21/02164 ,  C23C16/045 ,  C23C16/46 ,  C23C16/50 ,  H01L21/02274 ,  H01L21/31612

Abstract: A method of reducing stress induced defects in a substrate according to an HDP-CVD process including providing a substrate for depositing a layer of material according to an HDP-CVD process; igniting a plasma for carrying out an HDP-CVD process; adjusting plasma operating parameters to achieve a first deposition-sputter ratio with respect to the substrate; depositing a first portion of the layer of material according to a first range of substrate temperatures; and, depositing at least a second portion of the layer of material according to at least a second range of substrate temperatures.

Abstract translation: 根据HDP-CVD工艺减少衬底中的应力诱发缺陷的方法，包括提供用于根据HDP-CVD工艺沉积材料层的衬底; 点燃等离子体进行HDP-CVD工艺; 调节等离子体操作参数以实现相对于基板的第一沉积溅射比; 根据衬底温度的第一范围沉积材料层的第一部分; 以及根据至少第二衬底温度范围沉积材料层的至少第二部分。

公开(公告)号：US5740014A

公开(公告)日：1998-04-14

申请号：US763812

申请日：1996-12-11

Applicant: Chun Sheng Lin

Inventor： Chun Sheng Lin

IPC: H01L23/467 ,  H05K7/20

CPC classification number: H01L23/467 ,  H01L2924/0002

Abstract: A CPU heat sink mounted on a CPU an carrying a fan above the CPU, the CPU heat sink having a flat base mounted on the CPU, the flat base having a thicker middle section disposed in contact with the CPU, and two thinner lateral sections bilaterally extended from the thicker middle section and spaced above the CPU, a plurality of upright fins longitudinally raised from the flat base, a plurality of ventilation grooves transversely cut through the upright fins for guiding currents of air from the fan through the upright fins, and, a plurality of ventilation slots transversely cut through the upright fins and the thinner lateral sections of the flat base for guiding currents of air from the fan toward the CPU.

Abstract translation: 安装在CPU上的CPU散热器，CPU上装有风扇，CPU散热器具有安装在CPU上的平坦基座，扁平底座具有与CPU接触的较厚的中间部分，以及两个较薄的横向部分 从较厚的中间部分延伸并且在CPU上方间隔开多个从平坦的基部纵向上升起的直立翅片，多个通过竖直翅片切割的通风槽，用于引导来自风扇的空气流经直立翅片， 多个通风槽横向切割穿过直立翅片和平坦基座的较薄横向部分，用于引导空气从风扇朝向CPU的流动。