公开(公告)号：US08866914B2

公开(公告)日：2014-10-21

申请号：US13845354

申请日：2013-03-18

Applicant: IIX Inc.

Inventor： Hiroshi Murase ,  Masayoshi Imoto

IPC: H04N17/00 ,  H04N17/02

CPC classification number: H04N17/02 ,  G09G3/006 ,  G09G3/3611 ,  G09G5/02 ,  G09G2320/0233 ,  G09G2320/0666 ,  G09G2320/0693 ,  G09G2360/145

Abstract: Provided is a pattern position detection method that allows detecting positions of patterns used for alignment with high accuracy. According to the pattern position detection method of the present invention, patterns are displayed on a liquid crystal panel (2) and captured by a camera (3). A black image is displayed on the liquid crystal panel (2) and captured by the camera (3) using a shutter speed or an f-number used when capturing the patterns. Based on a difference between a captured image of the patterns and a captured image of the black image, positions of images of the patterns on an imaging surface of the camera (3) are detected.

Abstract translation: 提供了一种允许以高精度检测用于对准的图案的位置的图案位置检测方法。 根据本发明的图案位置检测方法，将图案显示在液晶面板（2）上并由相机（3）捕获。 使用在拍摄图案时使用的快门速度或f数，在液晶面板（2）上显示黑色图像并由相机（3）拍摄。 基于图案的拍摄图像和黑色图像的拍摄图像之间的差异，检测相机（3）的成像表面上的图案的图像的位置。

公开(公告)号：US20140232880A1

公开(公告)日：2014-08-21

申请号：US13845354

申请日：2013-03-18

Applicant: IIX INC.

Inventor： Hiroshi MURASE ,  Masayoshi IMOTO

IPC: H04N17/02

CPC classification number: H04N17/02 ,  G09G3/006 ,  G09G3/3611 ,  G09G5/02 ,  G09G2320/0233 ,  G09G2320/0666 ,  G09G2320/0693 ,  G09G2360/145

Abstract: Provided is a pattern position detection method that allows detecting positions of patterns used for alignment with high accuracy. According to the pattern position detection method of the present invention, patterns are displayed on a liquid crystal panel (2) and captured by a camera (3). A black image is displayed on the liquid crystal panel (2) and captured by the camera (3) using a shutter speed or an f-number used when capturing the patterns. Based on a difference between a captured image of the patterns and a captured image of the black image, positions of images of the patterns on an imaging surface of the camera (3) are detected.

Abstract translation: 提供了一种允许以高精度检测用于对准的图案的位置的图案位置检测方法。 根据本发明的图案位置检测方法，将图案显示在液晶面板（2）上并由相机（3）捕获。 使用在拍摄图案时使用的快门速度或f数，在液晶面板（2）上显示黑色图像并由相机（3）拍摄。 基于图案的拍摄图像和黑色图像的拍摄图像之间的差异，检测相机（3）的成像表面上的图案的图像的位置。

公开(公告)号：US20240135894A1

公开(公告)日：2024-04-25

申请号：US18279152

申请日：2021-03-10

Applicant: IIX INC.

Inventor： Makoto HATAKENAKA ,  Takashi SAKAMOTO ,  Mitsuo HAGIWARA ,  Norimasa SENDA ,  Yoshihide MINEGISHI ,  Hiroshi MURASE

IPC: G09G3/36

CPC classification number: G09G3/3611 ,  G09G2320/0233 ,  G09G2320/0626 ,  G09G2320/0673 ,  G09G2360/16

Abstract: A panel drive circuit having an input interface to which an image signal is input, a gamma correction circuit that corrects an image processing signal generated by an image processing circuit performing image processing on the image signal input to the input interface, such that a gamma correction signal thus generated has predetermined gamma characteristics, an unevenness correction circuit that corrects the gamma correction signal generated through the correction by the gamma correction circuit, based on correction data for reducing unevenness of a display panel, and an D/A convertor that has a variable output voltage range, and performs D/A conversion on an unevenness correction signal generated through the correction by the unevenness correction circuit and outputs the signal thus generated to the display panel, and the unevenness correction circuit changes the correction method according to the output voltage range of the D/A convertor.

公开(公告)号：US11823610B2

公开(公告)日：2023-11-21

申请号：US17912985

申请日：2021-02-25

Applicant: IIX INC.

Inventor： Makoto Hatakenaka ,  Takashi Sakamoto ,  Yoshihide Minegishi ,  Ryohei Hatta ,  Norimasa Senda

IPC: G09G3/20

CPC classification number: G09G3/2074 ,  G09G2300/0452 ,  G09G2310/08 ,  G09G2330/021

Abstract: An input signal correction device includes an input circuit, extension circuit, degenerate circuit, separation circuit, recovery circuit and delay adjustment circuit that operate at an operating frequency f, demura circuit that operates at an operating frequency f/2, and adder circuit. The extension circuit extends the period of R and B input signals by a factor of 2 and outputs preprocessing signals, the degenerate circuit degenerates a G input signal, the demura circuit corrects preprocessing signals from the extension and degenerate circuits and outputs correction signals, the separation circuit reduces the period of the R and B correction signals to ½ and outputs differential signals, recovery circuit reduces the period of G correction signal to ½ and outputs the same differential signal over two periods, the delay adjustment circuit delays the input and output signals, and the adder circuit adds the differential signals to the delay signals and outputs output signals.

公开(公告)号：US10750148B2

公开(公告)日：2020-08-18

申请号：US16071461

申请日：2016-12-19

Applicant: IIX INC.

Inventor： Makoto Hatakenaka ,  Takashi Sakamoto ,  Keisuke Okada

IPC: H04N9/69 ,  G09G3/20 ,  G09G3/36 ,  G09G3/3233

Abstract: An unevenness correction system according to the present invention includes a panel drive circuit provided with a gamma correction circuit that performs gamma correction on an image signal input to an input interface, a gamma correction information acquisition circuit that acquires a gamma correction signal obtained through gamma correction as gamma correction information, an unevenness correction circuit that performs an unevenness correction on the gamma correction signal based on correction data, and an output interface that externally outputs the gamma correction information, and an unevenness correction apparatus provided with a pattern generator that outputs the image signal of a predetermined image to the input interface, and a control unit that generates correction data based on gamma correction information of each individual display panel input to and read by a gamma correction information reading unit from the output interface regarding the output image signal.

公开(公告)号：US10015373B2

公开(公告)日：2018-07-03

申请号：US15125936

申请日：2014-07-15

Applicant: IIX INC.

Inventor： Hiroshi Murase

IPC: H04N5/217 ,  H04N5/232 ,  G09G3/3208

CPC classification number: H04N5/2173 ,  G01M11/00 ,  G02F1/13 ,  G09G3/006 ,  G09G3/20 ,  G09G3/3208 ,  G09G3/36 ,  G09G2320/0233 ,  G09G2320/029 ,  G09G2320/0693 ,  G09G2340/0464 ,  H04N5/232 ,  H04N5/23212 ,  H04N5/23229 ,  H04N5/66 ,  H04N17/04

Abstract: Provided is an image processing method, an image processing apparatus, and the like according to which the influence of moiré can be suppressed without incurring a decrease in image resolution. An image is captured in a state in which moiré, which appears when capturing an image in-focus, has appeared, a first image is generated by removing a spatial frequency component corresponding to the moiré from the captured image using a high-pass filter, an image is captured out-of-focus by the camera, a second image is generated by applying a low-pass filter to the captured image, and a third image in which the moiré is eliminated or suppressed is generated by compositing the first image and the second image.

公开(公告)号：US20180027149A1

公开(公告)日：2018-01-25

申请号：US15125936

申请日：2014-07-15

Applicant: IIX INC.

Inventor： Hiroshi Murase

IPC: H04N5/217 ,  G09G3/3208 ,  H04N5/232

CPC classification number: H04N5/2173 ,  G01M11/00 ,  G02F1/13 ,  G09G3/006 ,  G09G3/20 ,  G09G3/3208 ,  G09G3/36 ,  G09G2320/0233 ,  G09G2320/029 ,  G09G2320/0693 ,  G09G2340/0464 ,  H04N5/232 ,  H04N5/23212 ,  H04N5/23229 ,  H04N5/66 ,  H04N17/04

Abstract: Provided is an image processing method, an image processing apparatus, and the like according to which the influence of moiré can be suppressed without incurring a decrease in image resolution. An image is captured in a state in which moiré, which appears when capturing an image in-focus, has appeared, a first image is generated by removing a spatial frequency component corresponding to the moiré from the captured image using a high-pass filter, an image is captured out-of-focus by the camera, a second image is generated by applying a low-pass filter to the captured image, and a third image in which the moiré is eliminated or suppressed is generated by compositing the first image and the second image.

公开(公告)号：US20150271409A1

公开(公告)日：2015-09-24

申请号：US14430883

申请日：2013-06-11

Applicant: IIX INC.

Inventor： Masayoshi Imoto ,  Hiroshi Murase ,  Shinya Tabata

IPC: H04N5/232 ,  G09G5/02 ,  H04N5/357 ,  H04N5/341 ,  H04N5/372 ,  H04N17/00 ,  G09G3/00

CPC classification number: H04N5/23264 ,  G09G3/006 ,  G09G3/20 ,  G09G5/02 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/0693 ,  G09G2360/145 ,  H04N5/341 ,  H04N5/357 ,  H04N5/372 ,  H04N17/004

Abstract: An image quality adjustment apparatus obtains correction data for correcting display unevenness of a display panel by capturing an image of the display panel using a camera, and includes a moire frequency control unit that performs a control to position the display panel and the camera at a predetermined relative angle with respect to each other, an unevenness measurement unit that measures the display unevenness of the display panel based on the image captured by the camera, and a correction data generation unit that generates the correction data based on the unevenness measured by the unevenness measurement unit. Arranging the panel and the camera at the predetermined relative angle shifts a spatial frequency component of a moire pattern occurring in the image captured by the camera out of a region where a spatial frequency component of the display unevenness is present, and removes an influence of the moire pattern.

Abstract translation: 图像质量调节装置通过使用照相机拍摄显示面板的图像来获得用于校正显示面板的显示不均的校正数据，并且包括：莫尔频率控制单元，其进行将显示面板和相机定位在预定位置的控制 相对于彼此相对的角度;不平度测量单元，其基于由照相机拍摄的图像来测量显示面板的显示不均匀;以及校正数据生成单元，其基于由不平坦度测量得到的不均匀性生成校正数据 单元。 将面板和相机以预定的相对角度排列将存在于由显示不均匀的空间频率分量的区域中的摄像机拍摄的图像中出现的莫尔图案的空间频率分量移位，并且消除 莫尔图案

公开(公告)号：US12148402B2

公开(公告)日：2024-11-19

申请号：US18279152

申请日：2021-03-10

Applicant: IIX INC.

Inventor： Makoto Hatakenaka ,  Takashi Sakamoto ,  Mitsuo Hagiwara ,  Norimasa Senda ,  Yoshihide Minegishi ,  Hiroshi Murase

IPC: G09G3/36

Abstract: A panel drive circuit having an input interface to which an image signal is input, a gamma correction circuit that corrects an image processing signal generated by an image processing circuit performing image processing on the image signal input to the input interface, such that a gamma correction signal thus generated has predetermined gamma characteristics, an unevenness correction circuit that corrects the gamma correction signal generated through the correction by the gamma correction circuit, based on correction data for reducing unevenness of a display panel, and an D/A convertor that has a variable output voltage range, and performs D/A conversion on an unevenness correction signal generated through the correction by the unevenness correction circuit and outputs the signal thus generated to the display panel, and the unevenness correction circuit changes the correction method according to the output voltage range of the D/A convertor.

公开(公告)号：US11990104B2

公开(公告)日：2024-05-21

申请号：US18028370

申请日：2021-02-25

Applicant: IIX INC.

Inventor： Makoto Hatakenaka ,  Takashi Sakamoto ,  Yoshihide Minegishi ,  Ryohei Hatta ,  Norimasa Senda

IPC: G09G5/04

CPC classification number: G09G5/04 ,  G09G2300/0452 ,  G09G2330/08 ,  G09G2330/10

Abstract: An input signal correction device for reducing power consumption is compatible with a variety of display panels, and includes an input circuit, extension/degeneration circuit, separation/recovery circuit and delay adjustment circuit operating at frequency f, demura circuit operating at frequency f/2, and adder circuit. The extension/degeneration circuit outputs a preprocessing signal increasing the input signal cycle length by 2 or outputs by degenerating the input signal to ½, based on a control signal, the demura circuit outputs a correction signal correcting the preprocessing signal from the extension/degeneration circuit, the separation/recovery circuit outputs a differential signal reducing the correction signal cycle length to ½ or reduces cycle length to ½ and outputs the same differential signal over two cycles, based on a control signal, the delay adjustment circuit outputs a delay signal delaying the input signal, and the adder circuit outputs a signal adding the differential signal to the delay signal.