摘要:
An ESD protection device with a silicon controlled rectifier (SCR) structure which is applied to a nano-device-based high-speed I/O interface circuit and semiconductor substrate operated by a low power voltage. The triple-well low-voltage-triggered ESD protection device includes: a deep n-type well formed on a p-type substrate; n- and p-type wells formed to be mutually connected in the deep n-type well; and a bias application region for applying a direct bias voltage to the p-type well.
摘要:
Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs comprised of PNP and NPN bipolar transistors, with the result that the ESD protection circuit can have great discharge capacity.
摘要:
Disclosed are a multi-chip assembly and a method for driving the same. The multi-chip assembly includes a first chip designed with a first device driven by a first power source and a second chip designed with a second device driven by a second power source. A power applying section applies first power to the first device of the first chip and a power converting section converts the first power to second power upon receiving the first power from the power applying section and applies the second power to the second device of the second chip. It is possible to provide the multi-chip assembly in the form of a package fabricated by stacking chips designed with mutually different devices driven through a single power source.