Triple-well low-voltage-triggered ESD protection device
    11.
    发明申请
    Triple-well low-voltage-triggered ESD protection device 审中-公开
    三重低电压触发ESD保护装置

    公开(公告)号:US20070131965A1

    公开(公告)日:2007-06-14

    申请号:US11634926

    申请日:2006-12-07

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0262 H01L29/7436

    摘要: An ESD protection device with a silicon controlled rectifier (SCR) structure which is applied to a nano-device-based high-speed I/O interface circuit and semiconductor substrate operated by a low power voltage. The triple-well low-voltage-triggered ESD protection device includes: a deep n-type well formed on a p-type substrate; n- and p-type wells formed to be mutually connected in the deep n-type well; and a bias application region for applying a direct bias voltage to the p-type well.

    摘要翻译: 具有可控硅整流器(SCR)结构的ESD保护器件,其被施加到基于纳米器件的高速I / O接口电路和由低功率电压操作的半导体衬底。 三阱低压触发ESD保护器件包括:在p型衬底上形成的深n型阱; 形成在深n型井中相互连接的n型和p型阱; 以及用于向p型阱施加直接偏置电压的偏置施加区域。

    Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
    12.
    发明申请
    Electrostatic discharge protection circuit using triple welled silicon controlled rectifier 有权
    静电放电保护电路采用三芯硅控整流器

    公开(公告)号:US20060125016A1

    公开(公告)日:2006-06-15

    申请号:US11294255

    申请日:2005-12-05

    IPC分类号: H01L23/62

    摘要: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs comprised of PNP and NPN bipolar transistors, with the result that the ESD protection circuit can have great discharge capacity.

    摘要翻译: 提供了一种应用于半导体集成电路(IC)的使用可控硅整流器(SCR)的静电放电(ESD)保护电路。 半导体衬底具有三重阱结构,使得偏置被施加到对应于ggNMOS器件的衬底的p阱。 因此,SCR的触发电压降低。 此外,使用由PNP和NPN双极晶体管组成的两个SCR形成两个放电路径,结果是ESD保护电路可以具有很高的放电容量。

    Multi-chip assembly and method for driving the same
    13.
    发明申请
    Multi-chip assembly and method for driving the same 审中-公开
    多芯片组装及其驱动方法

    公开(公告)号:US20050151237A1

    公开(公告)日:2005-07-14

    申请号:US10999415

    申请日:2004-11-30

    申请人: Kwi Kim Chang Lee

    发明人: Kwi Kim Chang Lee

    摘要: Disclosed are a multi-chip assembly and a method for driving the same. The multi-chip assembly includes a first chip designed with a first device driven by a first power source and a second chip designed with a second device driven by a second power source. A power applying section applies first power to the first device of the first chip and a power converting section converts the first power to second power upon receiving the first power from the power applying section and applies the second power to the second device of the second chip. It is possible to provide the multi-chip assembly in the form of a package fabricated by stacking chips designed with mutually different devices driven through a single power source.

    摘要翻译: 公开了一种多芯片组件及其驱动方法。 多芯片组件包括设计有由第一电源驱动的第一设备的第一芯片和设计有由第二电源驱动的第二设备的第二芯片。 功率施加部将第一功率施加到第一芯片的第一装置,并且功率转换部从接收到来自功率施加部的第一功率将第一功率转换为第二功率,并将第二功率施加到第二芯片的第二装置 。 可以提供通过堆叠设计成通过单个电源驱动的相互不同的器件的芯片制造的封装形式的多芯片组件。