Electrostatic discharge protection circuit using zener triggered silicon controlled rectifier
    1.
    发明申请
    Electrostatic discharge protection circuit using zener triggered silicon controlled rectifier 审中-公开
    使用齐纳触发的可控硅整流器的静电放电保护电路

    公开(公告)号:US20060125054A1

    公开(公告)日:2006-06-15

    申请号:US11302596

    申请日:2005-12-13

    IPC分类号: H01L29/167

    CPC分类号: H01L27/0262 H01L29/87

    摘要: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). The ESD protection circuit using an SCR includes: a semiconductor substrate including a first well and a second well; first and second heavily doped regions disposed in an upper portion of the first well; third and fourth heavily doped regions disposed in an upper portion of the second well; a fifth heavily doped region disposed at an interface between the first and second wells; a sixth heavily doped region disposed beside the fifth heavily doped region in the upper portion of the second well; a first overload preventing unit having a drain connected to the sixth heavily doped region, a source connected to the first and second heavily doped regions, and a gate connected to the first and second heavily doped regions through a first resistor; and a second overload preventing unit having a drain connected to the fifth heavily doped region, a source connected to the third and fourth heavily doped regions, and a gate connected to the third and fourth heavily doped regions through a second resistor.

    摘要翻译: 提供了一种应用于半导体集成电路(IC)的使用可控硅整流器(SCR)的静电放电(ESD)保护电路。 使用SCR的ESD保护电路包括:包括第一阱和第二阱的半导体衬底; 第一和第二重掺杂区域设置在第一阱的上部; 第三和第四重掺杂区域设置在第二阱的上部; 设置在第一和第二阱之间的界面处的第五重掺杂区域; 第六重掺杂区域,设置在第二阱的上部的第五重掺杂区域旁边; 第一过载防止单元,其具有连接到第六重掺杂区域的漏极,连接到第一和第二重掺杂区域的源极以及通过第一电阻器连接到第一和第二重掺杂区域的栅极; 以及第二过载防止单元,其具有连接到第五重掺杂区域的漏极,连接到第三和第四重掺杂区域的源极,以及通过第二电阻器连接到第三和第四重掺杂区域的栅极。

    Multi-band LC resonance voltage-controlled oscillator with adjustable negative resistance cell
    2.
    发明申请
    Multi-band LC resonance voltage-controlled oscillator with adjustable negative resistance cell 有权
    具有可调负电阻单元的多频带LC谐振压控振荡器

    公开(公告)号:US20070132522A1

    公开(公告)日:2007-06-14

    申请号:US11542288

    申请日:2006-10-02

    IPC分类号: H03B5/08

    摘要: Provided is an LC resonance voltage-controlled oscillator (VCO) used for a multi-band multi-mode wireless transceiver. In order to generate a multi-band frequency, a capacitor bank and a switchable inductor are included in the LC resonance voltage-controlled oscillator. The LC resonance voltage-controlled oscillator employs an adjustable emitter-degeneration negative resistance cell in place of tail current sources in order to compensate for non-uniform oscillation amplitude caused by the capacitor bank and prevent the degradation of a phase noise due to the tail current sources. The LC resonance voltage-controlled oscillator includes an inductor providing an inductance element partially determining the frequency of an oscillation wave; a discrete capacitor bank providing a capacitance element partially determining the frequency of the oscillation wave and being discretely determined by a control bit signal; and a discrete negative resistance cell providing a negative resistance element that is discretely determined by the control bit signal, to keep the amplitude of the oscillation wave constant.

    摘要翻译: 提供了一种用于多频带多模无线收发器的LC谐振压控振荡器(VCO)。 为了产生多频带频率,LC谐振压控振荡器中包括电容器组和可切换电感器。 LC谐振压控振荡器代替尾电流源采用可调发射极 - 退化负电阻电池,以补偿由电容器组引起的不均匀振荡幅度,并防止由于尾电流导致的相位噪声的降低 来源。 LC谐振电压控制振荡器包括:电感器,其提供部分地确定振荡波频率的电感元件; 分立电容器组,提供部分地确定振荡波的频率并由控制位信号离散地确定的电容元件; 以及提供由控制位信号离散地确定的负电阻元件的离散负电阻单元,以保持振荡波的幅度恒定。

    Wide-band multimode frequency synthesizer and variable frequency divider
    3.
    发明申请
    Wide-band multimode frequency synthesizer and variable frequency divider 有权
    宽带多模频率合成器和可变分频器

    公开(公告)号:US20070132515A1

    公开(公告)日:2007-06-14

    申请号:US11634004

    申请日:2006-12-05

    IPC分类号: H03L7/085

    摘要: A wide-band multimode frequency synthesizer using a Phase Locked Loop (PLL) is provided. The multiband frequency synthesizer includes a multimode prescaler, a phase detector/a charge pump, a swallow type frequency divider, and a switching bank LC tuning voltage-controlled oscillator having wide-band and low phase noise characteristics. The multimode prescaler operates in five modes and divides a signal up to 12 GHz. The wide-band frequency synthesizer can be used in various fields such as WLAN/HYPERLAN/DSRC/UWB systems that operate in the frequency range from 2 GHz to 9 GHz. The wide-band multimode frequency synthesizer includes a frequency/phase detector for comparing a frequency and phase of a reference high-frequency signal with a frequency and phase of a feedback high-frequency signal; a charge pump for producing an output current corresponding to the result of the comparison performed by the frequency/phase detector; a loop filter for producing an output voltage corresponding to an accumulated value of the output current of the charge pump; a voltage-controlled oscillator for generating an oscillation signal having a frequency corresponding to the output voltage of the loop filter; and a variable frequency divider for dividing an output signal of the voltage-controlled oscillator by a designated integer value, and outputting the result as a feedback signal, wherein at lease two of an amount of unit pumping charges of the charge pump, an RLC value of the loop filter, an RLC value of the voltage-controlled oscillator, and a divisor value of the variable frequency divider are controlled according to a band.

    摘要翻译: 提供了使用锁相环(PLL)的宽带多模频率合成器。 多频率频率合成器包括多模预分频器,相位检测器/电荷泵,燕子式分频器和具有宽带和低相位噪声特性的开关组LC调谐压控振荡器。 多模预分频器以五种模式工作,并将信号分为12 GHz。 宽带频率合成器可用于各种领域,例如在2 GHz至9 GHz频率范围内工作的WLAN / HYPERLAN / DSRC / UWB系统。 宽带多模频率合成器包括用于将参考高频信号的频率和相位与反馈高频信号的频率和相位进行比较的频率/相位检测器; 用于产生与由频率/相位检测器执行的比较结果相对应的输出电流的电荷泵; 环路滤波器,用于产生与电荷泵的输出电流的累积值相对应的输出电压; 用于产生具有与环路滤波器的输出电压对应的频率的振荡信号的压控振荡器; 以及可变分频器,用于将压控振荡器的输出信号除以指定的整数值,并输出该结果作为反馈信号,其中至少两个电荷泵的单位泵送电荷,RLC值 根据频带控制环路滤波器的电压控制振荡器的RLC值和可变分频器的除数值。

    Triple-well low-voltage-triggered ESD protection device
    4.
    发明申请
    Triple-well low-voltage-triggered ESD protection device 审中-公开
    三重低电压触发ESD保护装置

    公开(公告)号:US20070131965A1

    公开(公告)日:2007-06-14

    申请号:US11634926

    申请日:2006-12-07

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0262 H01L29/7436

    摘要: An ESD protection device with a silicon controlled rectifier (SCR) structure which is applied to a nano-device-based high-speed I/O interface circuit and semiconductor substrate operated by a low power voltage. The triple-well low-voltage-triggered ESD protection device includes: a deep n-type well formed on a p-type substrate; n- and p-type wells formed to be mutually connected in the deep n-type well; and a bias application region for applying a direct bias voltage to the p-type well.

    摘要翻译: 具有可控硅整流器(SCR)结构的ESD保护器件,其被施加到基于纳米器件的高速I / O接口电路和由低功率电压操作的半导体衬底。 三阱低压触发ESD保护器件包括:在p型衬底上形成的深n型阱; 形成在深n型井中相互连接的n型和p型阱; 以及用于向p型阱施加直接偏置电压的偏置施加区域。

    Electrostatic discharge protection circuit using triple welled silicon controlled rectifier
    5.
    发明申请
    Electrostatic discharge protection circuit using triple welled silicon controlled rectifier 有权
    静电放电保护电路采用三芯硅控整流器

    公开(公告)号:US20060125016A1

    公开(公告)日:2006-06-15

    申请号:US11294255

    申请日:2005-12-05

    IPC分类号: H01L23/62

    摘要: Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs comprised of PNP and NPN bipolar transistors, with the result that the ESD protection circuit can have great discharge capacity.

    摘要翻译: 提供了一种应用于半导体集成电路(IC)的使用可控硅整流器(SCR)的静电放电(ESD)保护电路。 半导体衬底具有三重阱结构,使得偏置被施加到对应于ggNMOS器件的衬底的p阱。 因此,SCR的触发电压降低。 此外,使用由PNP和NPN双极晶体管组成的两个SCR形成两个放电路径,结果是ESD保护电路可以具有很高的放电容量。

    Fringe field switching mode transflective liquid crystal display
    6.
    发明申请
    Fringe field switching mode transflective liquid crystal display 有权
    边缘场开关模式半透射液晶显示

    公开(公告)号:US20060256268A1

    公开(公告)日:2006-11-16

    申请号:US11215230

    申请日:2005-08-30

    IPC分类号: G02F1/1343 G02F1/1335

    摘要: Disclosed is a fringe field switching mode transflective liquid crystal display capable of displaying high quality images. The transflective liquid crystal display includes a lower substrate having a counter electrode and a pixel electrode, an upper substrate aligned in opposition to the lower substrate by interposing a liquid crystal layer therebetween, an upper polarizing plate, a lower polarizing plate, a reflective plate provided at an inner portion of the lower substrate, a lower λ/2 plate, and an upper λ/2 plate. An inclination angle, a slit width and a slit interval of the pixel electrode of the reflective area are different from those of the pixel electrode of the transmissive area. The liquid crystal layer presents a phase delay of about 0 to λ/4 in the reflective area and presents a phase delay of about 0 to λ/2 in the transmissive area.

    摘要翻译: 公开了能够显示高质量图像的边缘场切换模式半透射液晶显示器。 半透射型液晶显示器包括具有对电极和像素电极的下基板,通过在其间插入液晶层而与下基板对准的上基板,上偏振板,下偏振板,设置有反射板 在下基板的内部,下λ/ 2板和上λ/ 2板。 反射区域的像素电极的倾斜角度,狭缝宽度和狭缝间隔与透射区域的像素电极的倾斜角度,狭缝宽度和狭缝间隔不同。 液晶层在反射区域中呈现约0至λ/ 4的相位延迟,并且在透射区域中呈现约0至λ/ 2的相位延迟。

    Multi-chip assembly and method for driving the same
    7.
    发明申请
    Multi-chip assembly and method for driving the same 审中-公开
    多芯片组装及其驱动方法

    公开(公告)号:US20050151237A1

    公开(公告)日:2005-07-14

    申请号:US10999415

    申请日:2004-11-30

    申请人: Kwi Kim Chang Lee

    发明人: Kwi Kim Chang Lee

    摘要: Disclosed are a multi-chip assembly and a method for driving the same. The multi-chip assembly includes a first chip designed with a first device driven by a first power source and a second chip designed with a second device driven by a second power source. A power applying section applies first power to the first device of the first chip and a power converting section converts the first power to second power upon receiving the first power from the power applying section and applies the second power to the second device of the second chip. It is possible to provide the multi-chip assembly in the form of a package fabricated by stacking chips designed with mutually different devices driven through a single power source.

    摘要翻译: 公开了一种多芯片组件及其驱动方法。 多芯片组件包括设计有由第一电源驱动的第一设备的第一芯片和设计有由第二电源驱动的第二设备的第二芯片。 功率施加部将第一功率施加到第一芯片的第一装置,并且功率转换部从接收到来自功率施加部的第一功率将第一功率转换为第二功率,并将第二功率施加到第二芯片的第二装置 。 可以提供通过堆叠设计成通过单个电源驱动的相互不同的器件的芯片制造的封装形式的多芯片组件。

    Multi-cell gap fringe field switching mode LCD
    8.
    发明申请
    Multi-cell gap fringe field switching mode LCD 有权
    多单元格间隙边缘场切换模式LCD

    公开(公告)号:US20060164584A1

    公开(公告)日:2006-07-27

    申请号:US11135702

    申请日:2005-05-24

    申请人: Jun Park Kwi Kim

    发明人: Jun Park Kwi Kim

    IPC分类号: G02F1/1343

    摘要: A multi-cell gap fringe field switching mode LCD includes an upper substrate having an overcoat film and a lower substrate having a counter electrode and a pixel electrode successively formed thereon with a gate insulation film interposed between them. The overcoat film is patterned in such a manner that the cell gap at the center of the pixel electrode is different from that at the edge thereof and the overcoat film has a convex pattern formed on a part thereof corresponding to the center of the pixel electrode in a slanted profile and a concave pattern formed on a part thereof corresponding to the edge of the pixel electrode to optimize the driving voltage and phase delay value (Δnd) in each position of the pixel electrode.

    摘要翻译: 多单元间隙条纹场切换模式LCD包括具有外涂膜的上基板和在其间连续形成有栅极绝缘膜的反电极和像素电极的下基板。 外涂膜被图案化,使得像素电极的中心处的单元间隙与其边缘处的单元间隙不同,并且外涂膜具有形成在其对应于像素电极的中心的部分上的凸起图案 形成在与像素电极的边缘相对应的部分上的倾斜轮廓和凹形图案,以优化像素电极的每个位置中的驱动电压和相位延迟值(Deltand)。