摘要:
An apparatus, system, and method are disclosed. In one embodiment, the apparatus includes a virtualization engine on a computer platform. The virtualization engine can intercept multiple data transfer schedules from multiple virtual machines fetched from a memory by a physical Universal Serial Bus (USB) host controller on the computer platform. The virtualization engine also can merge the multiple fetched data transfer schedules into a merged data transfer schedule. The virtualization engine also can send the merged data transfer schedule to the physical USB host controller.
摘要:
A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.
摘要:
A device within a system, or an individual function of the device, may be reset to a known state while all other devices in the system or other functions of the device that are not being reset remain operational.
摘要:
Provided are a method, system and program for effecting an operating system mode change from one mode to another. In one embodiment, the operating system in one mode is placed in a sleep state in which volatile memory remains active. In booting an operating system from the sleep state, a flag may be detected indicating an operating system mode transfer request. In response, contents of a selected range of volatile memory allocated to the first operating system mode may be swapped with the contents of a selected range of a reserve portion of volatile memory allocated to the second operating system mode. Booting of an operating system in the second mode may be completed using the swapped contents of the volatile memory. Additional embodiments are described and claimed.
摘要:
A device including a storage controller. A flash memory is connected to the storage controller. The flash memory to store flash memory data. A processing unit is connected to the storage controller. The processing unit to generate memory commands. A volatile memory is connected to the processing unit. A non-volatile memory is connected to the storage controller. The non-volatile memory to retain the flash memory data. A process to perform memory commands on the flash memory data retained in the non-volatile memory.