Computing system and method that determines current configuration dependent on operand input from another configuration
    11.
    发明授权
    Computing system and method that determines current configuration dependent on operand input from another configuration 有权
    根据另一个配置的操作数输入确定当前配置的计算系统和方法

    公开(公告)号:US07451297B2

    公开(公告)日:2008-11-11

    申请号:US11143307

    申请日:2005-06-01

    CPC classification number: G06F9/4494

    Abstract: A dataflow graph is split into sub-graphs referred to as configurations, each configuration comprising computational hardware containing elements that operate on operand sets. A configuration executes by consuming completed operand sets from a designated input tag space (e.g., in a content addressable memory) until the operand sets are exhausted. At that point, the configuration is replaced by another configuration. The execution of a configuration may be triggered by system events, including by the completion of one or more other configurations. Each configuration has a list of inputs on which it depends to form complete operand sets. As other configurations that provide an input complete, a dependency flag is set in each dependent configuration. As each flag is set, the complete set of flags is checked for that configuration; if all the input flags for any configuration are set, then that configuration is scheduled for execution.

    Abstract translation: 数据流图被分为称为配置的子图,每个配置包括包含操作数集合的元素的计算硬件。 通过从指定的输入标签空间(例如,在内容可寻址存储器)中消耗完成的操作数集,直到操作数集合被耗尽来执行配置。 在这一点上,配置被另一个配置所取代。 配置的执行可以由系统事件触发,包括完成一个或多个其他配置。 每个配置都有一个输入列表,它依赖于其形成完整的操作数集。 作为提供输入完成的其他配置,在每个相关配置中设置依赖标志。 当每个标志被设置时,对该配置检查完整的标志集合; 如果任何配置的所有输入标志都被设置,那么该配置被安排执行。

    Interfacing I/O devices with a mobile server
    12.
    发明授权
    Interfacing I/O devices with a mobile server 有权
    将I / O设备与移动服务器接口

    公开(公告)号:US07539487B2

    公开(公告)日:2009-05-26

    申请号:US11275489

    申请日:2006-01-09

    CPC classification number: H04M1/7253

    Abstract: A mobile server is wirelessly communicable with at least one remote input/output (I/O) device to form a wireless personal-area network (PAN). The mobile server has at least one application program interface (API) allowing an application of arbitrary implementation on the mobile server to recognize and control at least one service implemented by the remote I/O device.

    Abstract translation: 移动服务器与至少一个远程输入/输出(I / O)设备无线通信,以形成无线个人区域网络(PAN)。 移动服务器具有允许在移动服务器上应用任意实现的至少一个应用程序接口(API)来识别和控制由远程I / O设备实现的至少一个服务。

    Worm-hole run-time reconfigurable processor field programmable gate
array (FPGA)
    13.
    发明授权
    Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) 失效
    蠕虫运行时可重构处理器现场可编程门阵列(FPGA)

    公开(公告)号:US5828858A

    公开(公告)日:1998-10-27

    申请号:US714348

    申请日:1996-09-16

    CPC classification number: G06F15/7867 G06F15/17343 G06F15/17381

    Abstract: Higher performance is gained through a new architecture which implements a new method of computational resource allocation, utilization and programming based on the concept of Worm-hole Run-Time Reconfiguration (RTR). A stream-driven Worm-hole RTR methodology extends contemporary data-flow paradigms to utilize the dynamic creation of operators and pathways, based upon stream processing in which parcels of data move through custom created pathways and interact with other parcels to achieve the desired computation. These parcels independently allocate the necessary computing resources and data paths as they navigate through the platform. The Worm-hole RTR platform consists of a large number of configurable functional units that perform the custom computations and rich, configurable interconnection pathways between the functional units. Once a computational pathway has been established (sensitized) by the head of the stream parcel, data are processed through the pathway with zero overhead. All ports entering the computing platform serve both to configure operations and pathways and to pass computational data streams. As a result, programming and configuration is not limited to a single port. Configuration through multiple independent ports allows greater concurrency, faster reconfiguration, and fewer computational dependencies, all with relatively low cost in silicon.

    Abstract translation: 通过一种基于蠕虫孔运行时重配置(RTR)概念实现计算资源分配,利用和编程的新方法的新架构获得了更高的性能。 基于流驱动的蠕虫孔RTR方法扩展了当前的数据流范式,以利用动态创建操作符和路径,基于流处理,其中数据包移动通过自定义创建的路径并与其他包裹进行交互以实现所需的计算。 这些包裹在他们浏览平台时独立地分配必要的计算资源和数据路径。 蠕虫RTR平台由大量可配置的功能单元组成,可执行定制计算和功能单元之间丰富,可配置的互连通路。 一旦计算路径已被流包裹的头部建立(敏感),数据就会以零开销通过路径进行处理。 进入计算平台的所有端口都可以配置操作和路径,并传递计算数据流。 因此,编程和配置不限于单个端口。 通过多个独立端口配置允许更大的并发性,更快的重新配置和更少的计算依赖性,所有这些都具有相对较低的硅成本。

    Side Channel Communications
    14.
    发明申请
    Side Channel Communications 审中-公开
    侧视频通信

    公开(公告)号:US20130044798A1

    公开(公告)日:2013-02-21

    申请号:US13334054

    申请日:2011-12-22

    CPC classification number: G06F21/554 G06F21/86 G06F2221/2101 H04L63/1425

    Abstract: A side channel communications system disclosed herein includes a receiver device with an internal circuitry where the operational speed of the internal circuitry changes in response to an external signal. When the receiver device receives an external signal, the operational speed of the internal circuitry changes. A detector detects the change in the operational speed of the internal circuitry to generate an output value, which is decoded to determine the information communicated by the external signal. In one implementation of the side channel communications system, the external transmitter communicates the external signal in the form of a temperature signal. Alternatively, the external transmitter communicates the external signal in the form of a change in the supply voltage.

    Abstract translation: 本文公开的侧通道通信系统包括具有内部电路的接收机设备,其中内部电路的操作速度响应于外部信号而改变。 当接收机设备接收到外部信号时,内部电路的运行速度发生变化。 检测器检测内部电路的操作速度的变化以产生输出值,该输出值被解码以确定由外部信号传送的信息。 在侧信道通信系统的一个实施方式中,外部发射机以温度信号的形式来传送外部信号。 或者,外部发射机以电源电压变化的形式来传送外部信号。

    Intrusion Detection and Communication
    15.
    发明申请
    Intrusion Detection and Communication 有权
    入侵检测与通信

    公开(公告)号:US20130044003A1

    公开(公告)日:2013-02-21

    申请号:US13334057

    申请日:2011-12-22

    CPC classification number: G06F21/554 G06F21/86 G06F2221/2101 H04L63/1425

    Abstract: An intrusion detection system disclosed herein includes a detector circuit that measures a change in value of impedance of an interconnection circuitry. A decoder coupled to the detector decodes the measured value of the change in the impedance of the interconnection circuitry to determine existence of an abnormal condition. In an example implementation of the intrusion detection system, the change in the value of the impedance of the interconnection circuitry is represented by a change in the phase delay on the interconnection circuitry. An implementation of the intrusion detection circuit terminates communication using the interconnection circuitry upon detection of the abnormal condition. The intrusion detection system is further configured to interpret the abnormal condition as a communication signal to the interconnection circuitry.

    Abstract translation: 本文公开的入侵检测系统包括检测器电路,其测量互连电路的阻抗值的变化。 耦合到检测器的解码器解码互连电路的阻抗的变化的测量值,以确定异常状况的存在。 在入侵检测系统的示例实现中,互连电路的阻抗值的变化由互连电路上的相位延迟的变化来表示。 入侵检测电路的实现在检测到异常情况时终止使用互连电路的通信。 入侵检测系统还被配置为将异常状况解释为互连电路的通信信号。

    FUNCTIONAL IMAGE REPRESENTATION
    16.
    发明申请
    FUNCTIONAL IMAGE REPRESENTATION 审中-公开
    功能图像表示

    公开(公告)号:US20100117931A1

    公开(公告)日:2010-05-13

    申请号:US12267628

    申请日:2008-11-10

    Abstract: A display apparatus described herein includes a display screen and a display processor. The display processor includes a plurality of function units that comprise functions that are representative of data that is desirably displayed on the display screen. The display processor is configured to receive configurations, compositions, and/or parameters for the plurality of function units. In addition, the display processor displays data on the display screen based at least in part upon output of the plurality of function units.

    Abstract translation: 本文所述的显示装置包括显示屏和显示处理器。 显示处理器包括多个功能单元,其包括表示希望显示在显示屏上的数据的功能。 显示处理器被配置为接收多个功能单元的配置,组合和/或参数。 此外,显示处理器至少部分地基于多个功能单元的输出在显示屏幕上显示数据。

    POINTING AND DATA ENTRY INPUT DEVICE
    17.
    发明申请
    POINTING AND DATA ENTRY INPUT DEVICE 有权
    指针和数据输入设备

    公开(公告)号:US20090128511A1

    公开(公告)日:2009-05-21

    申请号:US11941985

    申请日:2007-11-19

    Abstract: An input device includes an array of adjacent capacitive sensors arranged into rows and columns. Each capacitive sensor exhibits a capacitance characteristic when in proximity to a conductive element. A plurality of mechanical hysteresis mechanisms are each deposited on and in contact with each of the capacitive sensors and configured to be actuated by a corresponding push button. Each capacitive sensor exhibits an electrical characteristic upon actuation of the corresponding mechanical hysteresis mechanism. An insulating overlay layer positioned over the array of capacitive sensors and the plurality of mechanical hysteresis mechanisms defines each push button and defines a surface for accommodating the conductive element.

    Abstract translation: 输入装置包括布置成行和列的相邻电容传感器阵列。 每个电容传感器在接近导电元件时表现出电容特性。 多个机械滞后机构各自沉积在每个电容传感器上并与之接触,并且被配置为由相应的按钮致动。 每个电容传感器在相应的机械滞后机构的致动时表现出电特性。 位于电容传感器阵列上方的绝缘覆盖层和多个机械滞后机构限定每个按钮并且限定用于容纳导电元件的表面。

    Dynamic address windowing on a PCI bus

    公开(公告)号:US06883171B1

    公开(公告)日:2005-04-19

    申请号:US09324905

    申请日:1999-06-02

    CPC classification number: G06F13/4027

    Abstract: A multi-tasking operating system and method updates PCI address values in an extension register to ensure that various threads utilize the correct values when accessing peripheral PCI devices. When application program threads require access to a PCI device, the operating system writes the high order bits of the PCI device address to two places: (1) the extension register of the PCI host bridge to allow immediate addressing of the PCI device, and (2) separate memory locations associated with the threads. When a context switch occurs from a first thread to a second thread, the operating system retrieves the stored value from the memory location associated with the second thread and writes the value to the extension register. In this manner, when the second thread requires access to its PCI device, the proper address value is already located in the extension register.

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