摘要:
A combination gravimetric and volumetric fluid dispenser is disclosed which includes a scale linked to a controller. The controller is linked to a plurality of two stage valves which control the dispensing of large quantities of base materials. The controller is also linked to a plurality of nutating pumps which together with the controller controls the dispensing of smaller quantities of additive materials. The dispensing system disclosed is particularly useful for paints or other liquid formulations where larger quantities of base materials are added and which can be added by weight and whereby precise measurements of the larger base materials is not particularly required. However, the incorporation of nutating pumps and the addition of smaller amounts of additives by volume using the nutating pumps enables precise dispensing of the additives, such as colorants for paint. The larger containers or reservoirs of base material may be disposed at a remote location from the dispensing apparatus. The dispensing apparatus is also preferably designed with a modular configuration as shown and described. For viscous materials, an improved dispensing method is disclosed whereby viscous base material is added to the container first followed by smaller amounts of additives followed by additional dispensing of viscous base materials. By sandwiching the smaller amounts of additives between layers of base materials, an improved mix ability results for viscous materials such as base materials of paints and colorants.
摘要:
Control logic for controlling references to a cache (24) including a cache directory (62) which is capable of being configured into a plurality of ways, each way including tag and valid-bit storage for associatively searching the directory (62) for cache data-array addresses. A cache-configuration register and control logic (64) splits the cache directory (62) into two logical directories, one directory for controlling requests from a first processor and the other directory for controlling requests from a second processor. A prefetch buffer (63) is provided along with a prefetch control register for splitting the prefetch buffer into two logical channels, a first channel for handling prefetches associated with requests from the first processor, and a second channel for handling prefetches associated with requests from the second processor.