Time-of-flight arrangement and method for a time-of-flight measurement

    公开(公告)号:US12019190B2

    公开(公告)日:2024-06-25

    申请号:US16963329

    申请日:2019-01-30

    Applicant: ams AG

    CPC classification number: G01S7/4866 G01S7/484 G01S7/497

    Abstract: A time-of-flight arrangement (10) comprises a laser (15), a laser driver (12), a clock generator (11) that is coupled to the laser (15) via the laser driver (12), a photodiode circuit (50) and a time-to-digital converter (14). The photodiode circuit (50) comprises an avalanche photodiode (51), a quenching circuit (52), a diode node (53) and a readout circuit (54). The quenching circuit (52) is coupled via the diode node (53) to the avalanche photodiode (51). An input of the readout circuit (54) is connected to the diode node (53). At least one of the clock generator (11) and the readout circuit (54) is coupled on its output side to the input side of the time-to-digital converter (14).

    Optical driver arrangement and method for generating a driver signal

    公开(公告)号:US10677898B2

    公开(公告)日:2020-06-09

    申请号:US15507241

    申请日:2015-08-24

    Applicant: ams AG

    Abstract: An optical driver arrangement (10) comprises a comparator (11) and a pulse generator (15). The comparator (11) comprises a first input (12) for receiving a sensed output signal (S1) derived from a sensor signal (S2) generated by a light sensor (24), a second input (13) for receiving a reference signal (S3) and a comparator output (14) for providing a comparator signal (S4). The pulse generator (15) comprises a control input (16) coupled to the comparator output (14) and a generator output (22) for providing a driver signal (S5) to a light source (21). The driver signal (S4) comprises a series of at least one pulse and a parameter of the driver signal (S4) is controlled by the comparator signal (S4).

    TIME-TO-DIGITAL CONVERTER AND CONVERSION METHOD

    公开(公告)号:US20200110368A1

    公开(公告)日:2020-04-09

    申请号:US16470410

    申请日:2017-12-08

    Applicant: ams AG

    Abstract: A time-to-digital converter arrangement has a ring oscillator with a plurality of inverting elements and a first and a second counter coupled to the ring oscillator. The first counter is configured to increment a first counter value if a positive edge transition is present at one of the inverting elements. The second counter is configured to increment a second counter value if a negative edge transition is present at the one of the inverting elements. A storage element stores the first and the second counter value and logical states of the plurality of inverting elements. A decoder coupled to the storage element selects one of the first and the second counter value as a valid value based on an evaluation of the stored logical states, and outputs a total counter value based on the valid value and the stored logical states.

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