公开(公告)号：US10931964B2

公开(公告)日：2021-02-23

申请号：US15914154

申请日：2018-03-07

申请人： Arm Limited

发明人： Dominic Hugo Symes ,  Sven Ola Johannes Hugosson ,  Tomas Fredrik Edso

IPC分类号： H04N19/52 ,  H04N19/44 ,  H04N19/176 ,  H04N19/43 ,  H04N19/102 ,  H04N19/53 ,  H04N19/156 ,  H04N19/436

摘要： An apparatus for encoding frames of a sequence of source frames of video image data to be encoded. The apparatus includes encoding circuitry configured to encode the source frames using reference frames. The apparatus also includes monitoring circuitry configured to, when the encoding circuitry is encoding a source frame using one or more reference frames, monitor the memory bandwidth being used when using the one or more reference frames when encoding the source frame. The apparatus further includes encoding circuitry that is operable to, in response to the monitored memory bandwidth being greater than a threshold, to control the encoding circuitry to encode a subsequent part of the source frame using a modified video encoding process to restrict the memory bandwidth usage when using one or more reference frames when encoding a subsequent part of a source frame.

公开(公告)号：US10652563B2

公开(公告)日：2020-05-12

申请号：US16199624

申请日：2018-11-26

申请人： ARM Limited

发明人： Ola Hugosson ,  Dominic Hugo Symes

IPC分类号： H04N19/436 ,  H04N19/44 ,  H04N19/172

摘要： A video decoder configured to decode an encoded video bitstream comprises a first parsing unit and a second parsing unit, each configured to independently parse the encoded video bitstream to derive parsing state information therefrom on which subsequent parsing of the encoded video bitstream at least partially depends and to identify macroblock information for decoding. The encoded video bitstream comprises frame header information defining a sequence of frames and each frame is composed of macroblocks represented by macroblock information. A control unit of the video encoder allocates each frame of macroblock information to one of the two parsing units to parse. The two parsing units are both configured to parse frame header information to thereby each derive parsing state information for the encoded video bitstream, and the two parsing unit are each configured to parse macroblock information allocated to them, skipping macroblock information allocated to the other parsing unit.

公开(公告)号：US10609408B2

公开(公告)日：2020-03-31

申请号：US15443179

申请日：2017-02-27

申请人： ARM Limited

发明人： Dominic Hugo Symes ,  Stefan Johannes Frid

IPC分类号： H04N19/172 ,  H04N19/176 ,  H04N19/124 ,  H04N19/52 ,  H04N19/164 ,  H04N19/184

摘要： An apparatus for decoding a sequence of frames of encoded video data includes parsing circuitry configured to parse the encoded video image data for a frame to derive encoding information for each block of the frame. The apparatus also includes feedback circuitry configured to feed back, to the parsing circuitry, encoding information for a frame for use when parsing the encoded video image data of the next frame. The encoding information includes an encoding indicator for each block. When the encoding indicators were enabled when encoding the blocks of the frame, the encoding indicator fed back for a block is the encoding indicator that was used to encode that block. When the encoding indicators for the blocks of the frame were disabled when encoding the video image data for the frame, the encoding indicator fed back for a block is an encoding indicator derived from a previous frame.

公开(公告)号：US11561795B2

公开(公告)日：2023-01-24

申请号：US16834833

申请日：2020-03-30

申请人： Arm Limited

发明人： Jens Olson ,  John Wakefield Brothers, III ,  Jared Corey Smolens ,  Chi-wen Cheng ,  Daren Croxford ,  Sharjeel Saeed ,  Dominic Hugo Symes

IPC分类号： G06F9/30 ,  G06F9/38 ,  G06F9/345 ,  G06F7/499 ,  G06F7/57

摘要： Herein described is a method of operating an accumulation process in a data processing apparatus. The accumulation process comprises a plurality of accumulations which output a respective plurality of accumulated values, each based on a stored value and a computed value generated by a data processing operation. The method comprises storing a first accumulated value, the first accumulated value being one of said plurality of accumulated values, into a first storage device comprising a plurality of single-bit storage elements; determining that a predetermined trigger has been satisfied with respect to the accumulation process; and in response to the determining, storing at least a portion of a second accumulated value, the second accumulated value being one of said plurality of accumulated values, into a second storage device.

公开(公告)号：US11205077B1

公开(公告)日：2021-12-21

申请号：US16888068

申请日：2020-05-29

申请人： Arm Limited

发明人： Jayavarapu Srinivasa Rao ,  Daren Croxford ,  Dominic Hugo Symes

IPC分类号： G06K9/62 ,  G06N3/08 ,  G06N3/04 ,  G06K9/00

摘要： A method is described for operating on a frame of a video to generate a feature map of a neural network. The method determines if a block of the frame is an inter block or an intra block, and performs an inter block process in the event that the block is an inter block and/or an intra block process in the event that the block is an intra block. The inter block process determines a measure of differences between the block of the frame and a reference block of a reference frame of the video, and performs either a first process or a second process based on the measure to generate a segment of the feature map. The intra block process determines a measure of flatness of the block of the frame, and performs either a third process or a fourth process based on the measure to generate a segment of the feature map.

公开(公告)号：US10771792B2

公开(公告)日：2020-09-08

申请号：US16266664

申请日：2019-02-04

申请人： Arm Limited

发明人： Sven Ola Johannes Hugosson ,  Tomas Fredrik Edso ,  Dominic Hugo Symes

IPC分类号： H04N19/00 ,  H04N19/174 ,  H03M7/30 ,  H04N19/152 ,  H04N19/46 ,  H04N19/119

摘要： When encoding an array of data elements, or a stream of such arrays, using an encoder comprising encoding circuitry operable to encode the array(s) of data elements as a plurality of independent segments, wherein each independent segment can be decoded independently; a header is generated for output with an encoded data stream including the plurality of independent segments wherein the header contains information indicative of the location of each of the plurality of independent segments within the encoded data stream. When an encoded data stream associated with such a header is to be decoded, a decoder may thus read the header to identify the location of the independent segment within the data stream and then read and decode the identified segments from the identified location(s) in the data stream.

公开(公告)号：US20190246117A1

公开(公告)日：2019-08-08

申请号：US16266664

申请日：2019-02-04

申请人： Arm Limited

发明人： Sven Ola Johannes Hugosson ,  Tomas Fredrik Edso ,  Dominic Hugo Symes

IPC分类号： H04N19/174 ,  H03M7/30 ,  H04N19/46 ,  H04N19/119 ,  H04N19/152

摘要： When encoding an array of data elements, or a stream of such arrays, using an encoder comprising encoding circuitry operable to encode the array(s) of data elements as a plurality of independent segments, wherein each independent segment can be decoded independently; a header is generated for output with an encoded data stream including the plurality of independent segments wherein the header contains information indicative of the location of each of the plurality of independent segments within the encoded data stream. When an encoded data stream associated with such a header is to be decoded, a decoder may thus read the header to identify the location of the independent segment within the data stream and then read and decode the identified segments from the identified location(s) in the data stream.

公开(公告)号：US20180276873A1

公开(公告)日：2018-09-27

申请号：US15923628

申请日：2018-03-16

申请人： Arm Limited

发明人： Daren Croxford ,  Sharjeel Saeed ,  Jayavarapu Srinivasa Rao ,  Ozgur Ozkurt ,  Dominic Hugo Symes

IPC分类号： G06T15/20 ,  H04N13/30 ,  G06T7/11 ,  G06T7/174

CPC分类号： G06T15/20 ,  G06F3/14 ,  G06T7/11 ,  G06T7/174 ,  G09G3/003 ,  G09G5/006 ,  G09G2340/02 ,  G09G2350/00 ,  G09G2360/18 ,  H04N13/106 ,  H04N2013/0081 ,  H04N2013/0085

摘要： A method of operating a data processing system is disclosed for a data processing system that comprises a display and a display controller operable to provide to the display data in respect of output surfaces to be displayed. The method comprises, when an output surface is to be displayed, the display controller providing to the display data in respect of the output surface in the form of image data and image modification data, and the display using the image data and the image modification data when producing an output surface for display.

公开(公告)号：US09378186B2

公开(公告)日：2016-06-28

申请号：US14225473

申请日：2014-03-26

申请人： ARM LIMITED

发明人： Dominic Hugo Symes ,  Tomas Edso

IPC分类号： G06F17/14 ,  H04N19/625

CPC分类号： G06F17/147 ,  H04N19/625

摘要： A data processing apparatus and method are provided for performing a transform between spatial and frequency domains when processing video data. The data processing apparatus comprises transform circuitry configured to receive N input values and to perform a sequence of operations to generate N output values representing the transform of the N input values between the spatial and frequency domains. In doing this, the transform circuitry employs a base circuitry that is configured to receive M internal input values generated by the transform circuitry, where M is greater than or equal to 4, and to perform a base operation equivalent to matrix multiplication of the M internal input values by a Hankel matrix, which is a square matrix with constant skew diagonals, where each element of the array identifies a coefficient, performance of the base operation generating M internal output values for returning to the transform circuitry. The transform circuitry is arranged during performance of the sequence of operations to generate from the N input values multiple sets of the M internal input values, to provide each set of M internal input values to the base circuitry in order to cause multiple sets of the M internal output values to be produced, and to derive the N output values from the multiple sets of M internal output values. It has been found that such an approach is scalable to accommodate varying sizes of N, results in a significant reduction in the number of multiplications required in order to perform the transform between the spatial and frequency domains of the N input values, and produces a bit exact result.

摘要翻译： 提供了一种数据处理装置和方法，用于在处理视频数据时执行空域与频域之间的变换。 数据处理装置包括被配置为接收N个输入值并且执行一系列操作以产生表示空间和频域之间的N个输入值的变换的N个输出值的变换电路。 在这样做时，变换电路采用基本电路，其被配置为接收由变换电路产生的M个内部输入值，其中M大于或等于4，并且执行等效于M内部的矩阵乘法的基本操作 输入值由Hankel矩阵，其是具有恒定偏斜对角线的方阵，其中阵列的每个元素识别系数，基本运算的性能产生用于返回到变换电路的M个内部输出值。 变换电路在执行操作序列期间被布置，以从N个输入值生成多组M个内部输入值，以将每组M个内部输入值提供给基本电路，以便产生多组M 要产生的内部输出值，并从多组M个内部输出值中导出N个输出值。 已经发现，这种方法是可扩展的以适应N的不同大小，导致为了执行N个输入值的空间域和频域之间的变换所需的乘法数量的显着减少，并且产生一个位 确切的结果。

公开(公告)号：US09189646B2

公开(公告)日：2015-11-17

申请号：US14173418

申请日：2014-02-05

申请人： ARM LIMITED

发明人： Ola Hugosson ,  Erik Persson ,  Dominic Hugo Symes

IPC分类号： G06F21/00 ,  G06F21/62

CPC分类号： G06F21/6218 ,  G06F21/78

摘要： A data processing apparatus is provided, comprising plural processing units configured to execute plural processes, a storage unit configured to store data required for the plural processes; and a protection unit configured to control access by the plural processes to the storage unit. The protection unit is configured to define an allocated access region of the storage unit for each process of the plural processes, wherein the protection unit is configured to deny access for each the process outside the allocated access region and wherein allocated access regions are defined to be non-overlapping. The protection unit is configured to define each allocated access region as a contiguous portion of the storage unit between a lower region limit and an upper region limit, and the protection unit is configured such that when the lower region limit is modified the lower region limit cannot be decreased and such that when the upper region limit is modified the upper region limit cannot be decreased.

摘要翻译： 提供了一种数据处理装置，包括被配置为执行多个处理的多个处理单元，被配置为存储多个处理所需的数据的存储单元; 以及保护单元，被配置为控制通过所述多个处理对所述存储单元的访问。 保护单元被配置为为多个进程的每个进程定义存储单元的分配的访问区域，其中保护单元被配置为拒绝对所分配的访问区域之外的每个进程的访问，并且其中分配的访问区域被定义为 不重叠。 保护单元被配置为将每个分配的访问区域定义为存储单元在下限区域和上区域限制之间的连续部分，并且保护单元被配置为使得当下区域限制被修改时，下区域限制不能 并且使得当上限区域被修改时，上限区域不能减小。