公开(公告)号：US10552160B2

公开(公告)日：2020-02-04

申请号：US15987113

申请日：2018-05-23

Applicant: ARM Limited

Inventor： Ian Michael Caulfield ,  Max John Batley ,  Chiloda Ashan Senarath Pathirane

IPC: G06F9/38

Abstract: A processing pipeline for processing instructions with instructions from multiple threads in flight concurrently may have control circuitry to detect a stalling event associated with a given thread. In response, at least one instruction of the given thread may be flushed from the pipeline, and the control circuitry may trigger fetch circuitry to reduce a fraction of the fetched instructions which are fetched from the given thread. A mechanism is also described to determine when to trigger a predetermined action when a delay in accessing information becomes greater than a delay threshold, and to update the delay threshold based on a difference between a return delay when the information is returned from the storage circuitry and the delay threshold.

公开(公告)号：US20170185542A1

公开(公告)日：2017-06-29

申请号：US14757577

申请日：2015-12-24

Applicant: ARM LIMITED

Inventor： Max John Batley ,  Ian Michael Caulfield ,  Chris Abernathy

IPC: G06F13/16 ,  G06F12/12

Abstract: Arbitration circuitry is provided for arbitrating between requests awaiting servicing. The requests require variable numbers of resources and the arbitration circuitry permits the request to be serviced in a different order to the order in which they were received. Checking circuitry prevents a given request other than a oldest request from being serviced when a number of available resources is less than a threshold number of resources. The threshold number is varied based on the number of resources required for at least one other request awaiting servicing.