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公开(公告)号:US20200312224A1
公开(公告)日:2020-10-01
申请号:US16505784
申请日:2019-07-09
Applicant: AU Optronics Corporation
Inventor: Chun-Feng LIN , Chuang-Cheng YANG , Ming-Hsien LEE , Yi-Cheng LIN , Wei-Chia CHIU
IPC: G09G3/32
Abstract: A control circuit includes a power supply switch unit and a reset switch unit. The power supply switch unit is electrically connected to a data line and a pixel circuit. When the data line has a data voltage, the power supply switch unit is turned on according to a power supply signal, so that the pixel circuit is charged by the data voltage. The reset switch unit is electrically connected to the pixel circuit. After the pixel circuit is charged by the data voltage, the reset switch unit is turned on according to the reset signal to reset a voltage of the pixel circuit to the reset voltage.
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公开(公告)号:US20200098305A1
公开(公告)日:2020-03-26
申请号:US16527758
申请日:2019-07-31
Applicant: AU Optronics Corporation
Inventor: Chuang-Cheng YANG , Ming-Hsien LEE , Kai-Wei HONG , Yi-Cheng LIN , Chun-Feng LIN
Abstract: The disclosure provides a light emitting diode including a light emitting diode (LED), a first transistor, a second transistor and capacitor. A cathode terminal of the LED is configured to receive a first power supply voltage. A first port of the capacitor coupled to the gate of the first transistor is configured to store a data signal in a first duration. A first port of the second transistor is configured to receive a second power supply voltage. A gate of the second transistor is configured to receive a PWM signal in a second duration. A second port of the second transistor is coupled to the second port of the first transistor. The second transistor is turned on for a conducting time in the second duration according to the PWM signal, and the first transistor provides, in the conducting time, a drive current to the LED according to the data signal.
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公开(公告)号:US20200051486A1
公开(公告)日:2020-02-13
申请号:US16534401
申请日:2019-08-07
Applicant: AU Optronics Corporation
Inventor: Che-Chia CHANG , Ming-Hsien LEE , Chun-Fu CHUNG , Ming-Hung CHUANG
IPC: G09G3/20
Abstract: A display device includes multiple shift register groups, multiple multiplexer groups, a driver IC, and multiple pixel circuits. The driver IC is configured to control the multiple shift register groups and the multiple multiplexer groups. A shift register group of the multiple shift register groups and a multiplexer group of the multiple multiplexer groups cooperatively drive a part of pixel circuits of the multiple pixel circuits. When the shift register group and the multiplexer group are enabled in a first time period, other shift register groups and other multiplexer groups are enabled in a second time period within the first time period. The first time period is longer than the second time period to render the part of pixel circuits and another part of pixel circuits to respectively have a first frame rate and a second frame rate.
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